JPS62214648A - 半導体素子用パツケ−ジの製造方法 - Google Patents

半導体素子用パツケ−ジの製造方法

Info

Publication number
JPS62214648A
JPS62214648A JP61057698A JP5769886A JPS62214648A JP S62214648 A JPS62214648 A JP S62214648A JP 61057698 A JP61057698 A JP 61057698A JP 5769886 A JP5769886 A JP 5769886A JP S62214648 A JPS62214648 A JP S62214648A
Authority
JP
Japan
Prior art keywords
conductive paste
ceramic green
green sheet
semiconductor element
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61057698A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0459778B2 (enExample
Inventor
Takeshi Suzuki
剛 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NGK Insulators Ltd
Original Assignee
NGK Insulators Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NGK Insulators Ltd filed Critical NGK Insulators Ltd
Priority to JP61057698A priority Critical patent/JPS62214648A/ja
Publication of JPS62214648A publication Critical patent/JPS62214648A/ja
Publication of JPH0459778B2 publication Critical patent/JPH0459778B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60—Seals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP61057698A 1986-03-15 1986-03-15 半導体素子用パツケ−ジの製造方法 Granted JPS62214648A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61057698A JPS62214648A (ja) 1986-03-15 1986-03-15 半導体素子用パツケ−ジの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61057698A JPS62214648A (ja) 1986-03-15 1986-03-15 半導体素子用パツケ−ジの製造方法

Publications (2)

Publication Number Publication Date
JPS62214648A true JPS62214648A (ja) 1987-09-21
JPH0459778B2 JPH0459778B2 (enExample) 1992-09-24

Family

ID=13063155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61057698A Granted JPS62214648A (ja) 1986-03-15 1986-03-15 半導体素子用パツケ−ジの製造方法

Country Status (1)

Country Link
JP (1) JPS62214648A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5067007A (en) * 1988-06-13 1991-11-19 Hitachi, Ltd. Semiconductor device having leads for mounting to a surface of a printed circuit board
US5094969A (en) * 1989-09-14 1992-03-10 Litton Systems, Inc. Method for making a stackable multilayer substrate for mounting integrated circuits

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5816552A (ja) * 1981-07-22 1983-01-31 Fujitsu Ltd 半導体素子用パッケ−ジ
JPS5851544A (ja) * 1981-09-22 1983-03-26 Fujitsu Ltd 半導体装置のパツケ−ジ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5816552A (ja) * 1981-07-22 1983-01-31 Fujitsu Ltd 半導体素子用パッケ−ジ
JPS5851544A (ja) * 1981-09-22 1983-03-26 Fujitsu Ltd 半導体装置のパツケ−ジ

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5067007A (en) * 1988-06-13 1991-11-19 Hitachi, Ltd. Semiconductor device having leads for mounting to a surface of a printed circuit board
US5094969A (en) * 1989-09-14 1992-03-10 Litton Systems, Inc. Method for making a stackable multilayer substrate for mounting integrated circuits

Also Published As

Publication number Publication date
JPH0459778B2 (enExample) 1992-09-24

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees