JPS62178574U - - Google Patents

Info

Publication number
JPS62178574U
JPS62178574U JP6706286U JP6706286U JPS62178574U JP S62178574 U JPS62178574 U JP S62178574U JP 6706286 U JP6706286 U JP 6706286U JP 6706286 U JP6706286 U JP 6706286U JP S62178574 U JPS62178574 U JP S62178574U
Authority
JP
Japan
Prior art keywords
component mounting
electronic component
printed wiring
mounting land
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6706286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6706286U priority Critical patent/JPS62178574U/ja
Publication of JPS62178574U publication Critical patent/JPS62178574U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例を示す部分平面図
、第2図は従来の印刷配線板を示す部分平面図で
ある。 図において、1は絶縁基板、2は銅箔(導電箔
)パターン、3は電子部品取付けランド、4は電
子部品、7は捨てランドである。図中同一符号は
同一或は相当部分を示す。
FIG. 1 is a partial plan view showing an embodiment of this invention, and FIG. 2 is a partial plan view showing a conventional printed wiring board. In the figure, 1 is an insulating substrate, 2 is a copper foil (conductive foil) pattern, 3 is an electronic component mounting land, 4 is an electronic component, and 7 is a waste land. The same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 絶続基板上に、電子部品取付けランドを有する
導電箔パターンを形成し、上記電子部品取付けラ
ンドに電子部品をリフロー法で半田付けを行なう
ようにした印刷配線板において、上記電子部品取
付けランドの近傍に電子部品が接続されない導電
箔パターンの捨てランドを設けたことを特徴とす
る印刷配線板。
In a printed wiring board in which a conductive foil pattern having an electronic component mounting land is formed on a discontinuous board, and electronic components are soldered to the electronic component mounting land by a reflow method, the electronic component mounting land is located near the electronic component mounting land. A printed wiring board characterized in that a conductive foil pattern discarded land to which electronic components are not connected is provided on the printed wiring board.
JP6706286U 1986-04-30 1986-04-30 Pending JPS62178574U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6706286U JPS62178574U (en) 1986-04-30 1986-04-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6706286U JPS62178574U (en) 1986-04-30 1986-04-30

Publications (1)

Publication Number Publication Date
JPS62178574U true JPS62178574U (en) 1987-11-12

Family

ID=30905626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6706286U Pending JPS62178574U (en) 1986-04-30 1986-04-30

Country Status (1)

Country Link
JP (1) JPS62178574U (en)

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