JPS62170575U - - Google Patents

Info

Publication number
JPS62170575U
JPS62170575U JP5943486U JP5943486U JPS62170575U JP S62170575 U JPS62170575 U JP S62170575U JP 5943486 U JP5943486 U JP 5943486U JP 5943486 U JP5943486 U JP 5943486U JP S62170575 U JPS62170575 U JP S62170575U
Authority
JP
Japan
Prior art keywords
test
semiconductor device
semiconductor
under test
device under
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5943486U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5943486U priority Critical patent/JPS62170575U/ja
Publication of JPS62170575U publication Critical patent/JPS62170575U/ja
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例の要部を示す構成説
明図、第２図は第１図の装置におけるＤＵＴのハ
ンドリングの具体例を示す構成説明図である。 １…テスト対象半導体装置（ＤＵＴ）、２，３
…テストヘツド、４…レール、５，６…測定ピン
。 FIG. 1 is an explanatory diagram showing a main part of an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing a specific example of handling of a DUT in the apparatus shown in FIG. 1... Semiconductor device under test (DUT), 2, 3
...Test head, 4...Rail, 5, 6...Measurement pin.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定のケースにパツケージされた半導体装置を
テストする半導体テスト装置において、テスト対
象半導体装置と測定モジユールとの間で信号の授
受を行うために選択的にテスト対象半導体装置の
ピンに接触するように変位駆動される複数の接続
ピンを有する２個のテストヘツドがテスト対象半
導体装置を両面から挾むように対向配置されたこ
とを特徴とする半導体テスト装置。 In semiconductor test equipment that tests a semiconductor device packaged in a predetermined case, a device that is displaced so as to selectively contact pins of the semiconductor device under test in order to exchange signals between the semiconductor device under test and the measurement module. A semiconductor test device characterized in that two test heads each having a plurality of driven connection pins are arranged facing each other so as to sandwich a semiconductor device under test from both sides.
JP5943486U 1986-04-19 1986-04-19 Pending JPS62170575U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5943486U JPS62170575U (en) 1986-04-19 1986-04-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5943486U JPS62170575U (en) 1986-04-19 1986-04-19

Publications (1)

Publication Number Publication Date
JPS62170575U true JPS62170575U (en) 1987-10-29

Family

ID=30890925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5943486U Pending JPS62170575U (en) 1986-04-19 1986-04-19

Country Status (1)

Country Link
JP (1) JPS62170575U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0210488U (en) * 1988-06-23 1990-01-23

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0210488U (en) * 1988-06-23 1990-01-23

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