JPH0361338U - - Google Patents

Info

Publication number
JPH0361338U
JPH0361338U JP12186189U JP12186189U JPH0361338U JP H0361338 U JPH0361338 U JP H0361338U JP 12186189 U JP12186189 U JP 12186189U JP 12186189 U JP12186189 U JP 12186189U JP H0361338 U JPH0361338 U JP H0361338U
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit
bonding pad
signal
test circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12186189U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12186189U priority Critical patent/JPH0361338U/ja
Publication of JPH0361338U publication Critical patent/JPH0361338U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による集積回路装置の一実施例
を示す半導体チツプの部分平面図、第2図は従来
の集積回路装置の一例を示す半導体チツプの部分
平面図である。 1,2,3,4……信号配線、5……電源線、
6,7,8,14……ボンデイングパツド、9…
…プロービングパツド、10,11,12,13
……プローブ、15……半導体基板。
FIG. 1 is a partial plan view of a semiconductor chip showing an embodiment of an integrated circuit device according to the present invention, and FIG. 2 is a partial plan view of a semiconductor chip showing an example of a conventional integrated circuit device. 1, 2, 3, 4...signal wiring, 5...power line,
6, 7, 8, 14... bonding pad, 9...
...probing pad, 10, 11, 12, 13
...Probe, 15...Semiconductor substrate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 集積回路と、この集積回路と信号の受渡しをす
るボンデイングパツドと、回路機能を検査する試
験回路と、この試験回路に信号を印加するボンデ
イングパツドとを有する集積回路装置において、
前記試験回路に信号を印加する前記ボンデイング
パツドを削除して、代りに前記試験回路と接続す
る信号配線上にプロービングパツドを設けたこと
を特徴とする集積回路装置。
An integrated circuit device having an integrated circuit, a bonding pad for transferring signals to and from the integrated circuit, a test circuit for testing circuit function, and a bonding pad for applying a signal to the test circuit,
An integrated circuit device characterized in that the bonding pad for applying a signal to the test circuit is removed and a probing pad is provided on the signal wiring connected to the test circuit instead.
JP12186189U 1989-10-17 1989-10-17 Pending JPH0361338U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12186189U JPH0361338U (en) 1989-10-17 1989-10-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12186189U JPH0361338U (en) 1989-10-17 1989-10-17

Publications (1)

Publication Number Publication Date
JPH0361338U true JPH0361338U (en) 1991-06-17

Family

ID=31669883

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12186189U Pending JPH0361338U (en) 1989-10-17 1989-10-17

Country Status (1)

Country Link
JP (1) JPH0361338U (en)

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