JPS62166640U - - Google Patents

Info

Publication number
JPS62166640U
JPS62166640U JP1987044725U JP4472587U JPS62166640U JP S62166640 U JPS62166640 U JP S62166640U JP 1987044725 U JP1987044725 U JP 1987044725U JP 4472587 U JP4472587 U JP 4472587U JP S62166640 U JPS62166640 U JP S62166640U
Authority
JP
Japan
Prior art keywords
metal patterns
chip carrier
signal terminal
electric signal
external electric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987044725U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987044725U priority Critical patent/JPS62166640U/ja
Publication of JPS62166640U publication Critical patent/JPS62166640U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図ａ乃至ｃは従来のチツプキヤリヤ例を示
す図で、第１図ａは上面図、第１図ｂは側面図、
第１図ｃは裏面図である。第２図ａ乃至ｂは本考
案のチツプキヤリヤの実施例を示す図で、第２図
ｂは側面図、第２図ｂは裏面図である。また、第
３図ａは従来のチツプキヤリヤの熱伝導を示す等
価回路、第３図ｂは本考案の実施例のチツプキヤ
リヤの熱伝導を示す等価回路図である。 なお図において、１００……絶縁体基板、１０
２……ケース内に配線されたリード線、１０３…
…ＩＣチツプを搭載するキヤビシテイ、１０４…
…ＩＣチツプ、１０５……外部端子、１０６……
チツプキヤリヤを搭載するセラミツク基板、１０
７……ハンダ、１０８……セラミツク基板上の信
号端子、１０９……ポンデイングワイヤ、２０９
……絶縁体に形成された金属パターン、２１１…
…セラミツク基板上に形成された金属パターン、
である。 Figures 1a to 1c are views showing examples of conventional chip carriers, in which Figure 1a is a top view, Figure 1b is a side view,
FIG. 1c is a back view. Figures 2a to 2b are views showing an embodiment of the chip carrier of the present invention, with Figure 2b being a side view and Figure 2b being a back view. FIG. 3a is an equivalent circuit diagram showing heat conduction in a conventional chip carrier, and FIG. 3b is an equivalent circuit diagram showing heat conduction in a chip carrier according to an embodiment of the present invention. In the figure, 100... insulator substrate, 10
2... Lead wire wired inside the case, 103...
...Cavity for mounting an IC chip, 104...
...IC chip, 105... External terminal, 106...
Ceramic substrate on which chip carrier is mounted, 10
7...Solder, 108...Signal terminal on ceramic board, 109...Ponding wire, 209
...Metal pattern formed on insulator, 211...
...metal pattern formed on a ceramic substrate,
It is.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 薄い絶縁体基板の一方の面にＩＣを搭載し、他
方の面に外部電気信号用端子を具備するリードレ
スチツプキヤリヤケースにおいて、該外部電気信
号用端子を有する面の中央部に半田付け用金属パ
ターンが複数個が互いに離れてマトリクス状に設
けられ、該金属パターンが該金属パターンよりも
細い導電パターンによつて外部電気信号用端子と
電気的に接続されている事を特徴とするチツプキ
ヤリヤケース。 In a leadless chip carrier case in which an IC is mounted on one side of a thin insulating substrate and an external electric signal terminal is provided on the other side, a soldering pad is placed in the center of the surface that has the external electric signal terminal. A chip carrier characterized in that a plurality of metal patterns are provided in a matrix shape separated from each other, and the metal patterns are electrically connected to external electrical signal terminals by conductive patterns thinner than the metal patterns. rear case.
JP1987044725U 1987-03-26 1987-03-26 Pending JPS62166640U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987044725U JPS62166640U (en) 1987-03-26 1987-03-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987044725U JPS62166640U (en) 1987-03-26 1987-03-26

Publications (1)

Publication Number Publication Date
JPS62166640U true JPS62166640U (en) 1987-10-22

Family

ID=30862803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987044725U Pending JPS62166640U (en) 1987-03-26 1987-03-26

Country Status (1)

Country Link
JP (1) JPS62166640U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010171114A (en) * 2009-01-21 2010-08-05 Renesas Technology Corp Semiconductor device
JP2014116383A (en) * 2012-12-07 2014-06-26 Murata Mfg Co Ltd Electronic component

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5553446A (en) * 1978-10-16 1980-04-18 Fujitsu Ltd Container of electronic component

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5553446A (en) * 1978-10-16 1980-04-18 Fujitsu Ltd Container of electronic component

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010171114A (en) * 2009-01-21 2010-08-05 Renesas Technology Corp Semiconductor device
JP2014116383A (en) * 2012-12-07 2014-06-26 Murata Mfg Co Ltd Electronic component

Similar Documents

Publication Publication Date Title
JPS62166640U (en)
JPH0383952U (en)
JP2641912B2 (en) Lattice array type semiconductor device package
JPH0119395Y2 (en)
JPS5915383B2 (en) Mounting equipment for semiconductor integrated circuits
JPH041744Y2 (en)
JP2743524B2 (en) Hybrid integrated circuit device
JPH01174940U (en)
JPS6183075U (en)
JPS59166435U (en) porcelain capacitor block
JPH0459939U (en)
JPS62190374U (en)
JPH0390468U (en)
JPS6061736U (en) Hybrid IC
JPS63140625U (en)
JPS602863U (en) Substrate for power device mounting
JPS6122380U (en) hybrid integrated circuit board
JPS61107162U (en)
JPH0221776U (en)
JPS6448096U (en)
JPS60145566U (en) terminal connector
JPH0242458U (en)
JPH02146452U (en)
JPS62135440U (en)
JPS6429885U (en)