JPH0390468U - - Google Patents
Info
- Publication number
- JPH0390468U JPH0390468U JP15013089U JP15013089U JPH0390468U JP H0390468 U JPH0390468 U JP H0390468U JP 15013089 U JP15013089 U JP 15013089U JP 15013089 U JP15013089 U JP 15013089U JP H0390468 U JPH0390468 U JP H0390468U
- Authority
- JP
- Japan
- Prior art keywords
- circuit pattern
- metal substrate
- insulating layer
- electrical insulating
- laterally
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
第１図は、本考案の一実施例の構成を示す斜視
図、第２図は、同上実施例の−断面図、第３
図は、従来例を示す斜視図である。
１１……金属基板、１２……電気絶縁層、１３
……チツプ部品、１４……導電体層、１５……回
路パターン、１６……リードフレーム。
FIG. 1 is a perspective view showing the configuration of an embodiment of the present invention, FIG. 2 is a sectional view of the same embodiment, and FIG.
The figure is a perspective view showing a conventional example. 11... Metal substrate, 12... Electrical insulating layer, 13
...Chip parts, 14...Conductor layer, 15...Circuit pattern, 16...Lead frame.
Claims (1)
パターンが金属基板の表面に電気絶縁層を介して
形成されると共に、該回路パターンに電気接続さ
れた複数本のリードフレームが側方に引き出され
てなるハイブリツドＩＣにおいて、リードフレー
ムを、金属基板と電気絶縁層と回路パターンに連
なる導電体層とを側方に突出させて一体形成した
構造としたことを特徴とするハイブリツドＩＣ。 A circuit pattern made of a conductor that electrically connects chip components is formed on the surface of a metal substrate via an electrical insulating layer, and a plurality of lead frames electrically connected to the circuit pattern are pulled out laterally. A hybrid IC characterized in that a lead frame has a structure in which a metal substrate, an electrical insulating layer, and a conductive layer connected to a circuit pattern are integrally formed by protruding laterally.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15013089U JPH0390468U (en) | 1989-12-28 | 1989-12-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15013089U JPH0390468U (en) | 1989-12-28 | 1989-12-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0390468U true JPH0390468U (en) | 1991-09-13 |
Family
ID=31696496
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15013089U Pending JPH0390468U (en) | 1989-12-28 | 1989-12-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0390468U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6355570B2 (en) * | 1982-11-05 | 1988-11-02 | Kajima Corp | |
| JPH0389540A (en) * | 1989-09-01 | 1991-04-15 | Sanyo Electric Co Ltd | Hybrid integrated circuit |
-
1989
- 1989-12-28 JP JP15013089U patent/JPH0390468U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6355570B2 (en) * | 1982-11-05 | 1988-11-02 | Kajima Corp | |
| JPH0389540A (en) * | 1989-09-01 | 1991-04-15 | Sanyo Electric Co Ltd | Hybrid integrated circuit |