JPS6213850B2 - - Google Patents

Info

Publication number
JPS6213850B2
JPS6213850B2 JP55032888A JP3288880A JPS6213850B2 JP S6213850 B2 JPS6213850 B2 JP S6213850B2 JP 55032888 A JP55032888 A JP 55032888A JP 3288880 A JP3288880 A JP 3288880A JP S6213850 B2 JPS6213850 B2 JP S6213850B2
Authority
JP
Japan
Prior art keywords
frequency
signal
output
frequency divider
microwave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55032888A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56129429A (en
Inventor
Michio Nakanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3288880A priority Critical patent/JPS56129429A/ja
Publication of JPS56129429A publication Critical patent/JPS56129429A/ja
Publication of JPS6213850B2 publication Critical patent/JPS6213850B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP3288880A 1980-03-14 1980-03-14 Frequency divider Granted JPS56129429A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3288880A JPS56129429A (en) 1980-03-14 1980-03-14 Frequency divider

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3288880A JPS56129429A (en) 1980-03-14 1980-03-14 Frequency divider

Publications (2)

Publication Number Publication Date
JPS56129429A JPS56129429A (en) 1981-10-09
JPS6213850B2 true JPS6213850B2 (nl) 1987-03-30

Family

ID=12371414

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3288880A Granted JPS56129429A (en) 1980-03-14 1980-03-14 Frequency divider

Country Status (1)

Country Link
JP (1) JPS56129429A (nl)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127763U (ja) * 1982-02-24 1983-08-30 ソニー株式会社 Afc回路

Also Published As

Publication number Publication date
JPS56129429A (en) 1981-10-09

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