JPS6213850B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency divider that divides the frequency of a microwave signal using a synchronous frequency divider.

A conventional device of this type is shown in FIG. In the figure, 1 is a divider that branches part of the input microwave signal a, b is the microwave signal output that is output without being branched by the divider 1, 3 is a fixed signal oscillator, and 2 is the microwave signal that is output from the divider 1 without being branched. A frequency conversion mixer that mixes the fixed signal from the fixed signal oscillator 3, 4 a band waver for removing unnecessary waves connected to this mixer 2, and 5 a frequency converter that uses a digital circuit connected to this waver 4. frequency divider, c is frequency divider 5
is the divided output of

Next, the operation will be explained. Normally, when microwave band signals are synchronously divided, the frequency is very high, so in order to directly operate the frequency divider 5 using a digital circuit that is normally used in the frequency divider shown in FIG. As shown in the figure, a frequency conversion mixer 2 converts the microwave to a lower frequency using a signal from a fixed signal oscillator 3 provided separately, and after removing unnecessary waves through a bandpass converter 4, the digital circuit A signal whose frequency has been divided by N is extracted through a frequency divider 5 using a frequency divider 5. In this case, the distributor 1 does not have to be simply for extracting signals. The above operation can be described in terms of frequency as follows.

Fo=i− _L /N Here, Fo: Divided output frequency i: Microwave frequency _L : Fixed signal oscillator frequency (local oscillation frequency) Since the conventional frequency divider is configured as above, hypothetically When the input microwave frequency i has a wide variable range, or when you want to obtain a synchronous divided signal output over a wide frequency range,
Input local oscillation frequency _L Microwave frequency i
The choice must be made to separate the two, while the difference between the two
_L −i cannot be taken very large because it is dominated by the maximum operating frequency of the frequency divider using a digital circuit.
There was a problem with broadband performance. Furthermore, since frequency conversion is performed by the mixer 2, there are operational drawbacks such as jitter in the frequency-divided wave due to unnecessary waves.

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and instead of converting the microwave signal to a lower frequency through a frequency converter, it converts the microwave signal into a microwave signal using a phase-locked loop. By reproducing the synchronized signal at a low frequency, we eliminate the limitations imposed by the frequency selection of the local oscillator, and use a frequency divider that obtains a frequency-divided signal via the frequency divider rather than the low synchronization signal that is synchronized over a wide band. is intended to provide.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 shows a frequency divider according to an embodiment of the present invention, and in the figure, 1, a, and b are the same as those in FIG. 1. 6 is a phase detector that detects the phase difference between the branched signal and the signal from the frequency multiplier 7; 8 is a loop amplifier for a phase locked feedback loop that amplifies the output of the phase detector 6; 9 is a loop amplifier 8
7 is a frequency multiplier that multiplies the output of the voltage controlled oscillator 9 and applies it to the phase detector 6; 5 is a digital circuit that divides the output of the voltage controlled oscillator 9; , and c is its divided output.

Next, the operation will be explained.

The oscillation frequency of the voltage controlled oscillator 9 is set to a frequency that does not exceed the operating limit frequency of the frequency divider 5. The signal obtained by multiplying the output of the voltage controlled oscillator 9 by the multiplier 7 and the microwave input signal are compared by the phase detector 6, and the phase error is converted into a voltage. to leave negative feedback.
By the above operation, the phase of the output signal of the voltage controlled oscillator 9 in the steady state is maintained at the phase obtained by dividing the input microwave signal by the multiplication order. Next, part of the signal from the voltage controlled oscillator 9 is frequency-divided by the frequency divider 5, and a frequency-divided signal synchronized with the phase of the microwave signal can be extracted.

Now, if the angular frequency of the microwave input signal a is ωi, the angular frequency of the voltage controlled oscillator 9 is ωo, and the multiplication order of the multiplier 7 is R, then a phase locked loop consisting of the phase detector 6 or the voltage controlled oscillator 9 are in a synchronous state, the following relationship holds true.

ωi=Rωo Therefore, when a signal with an angular frequency ωo is frequency-divided by N, the total frequency-divided output Fo becomes Fo=ωi/NR, and the microwave is frequency-divided in a completely synchronous system.

The frequency divider using phase synchronization described above can be created by setting a wide band of the phase synchronization negative feedback loop.
It can have tracking characteristics and pull-in characteristics over a very wide band.

In the embodiment shown in FIG. 2, the microwave splitter 1 does not have to branch part of the signal.

As described above, according to the present invention, a frequency divider is configured by a circuit system in which a multiplier is provided in a phase-locked loop to reproduce a low frequency signal synchronized with the phase of an input wave, and the frequency of this signal is divided. Therefore, by setting the multiplication order of the multiplier to a high value and having wideband characteristics, it is possible to obtain a frequency divider that can be used even in a very high frequency range.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional frequency divider, and FIG. 2 is a block diagram of a frequency divider according to an embodiment of the present invention. 5... Frequency divider, 6... Phase detector, 7... Multiplier, 8... Loop amplifier, 9... Voltage controlled oscillator. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1. A phase detector that detects the phase difference between the input signal and the output of a multiplier (described later), a loop amplifier connected to the output of this phase detector, and a voltage whose oscillation frequency changes according to the output of this loop amplifier. A frequency divider comprising: a controlled oscillator; a multiplier that multiplies the output of the voltage-controlled oscillator and applies it to the phase detector; and a frequency divider that divides the output of the voltage-controlled oscillator. .