JPS6036909Y2 - multifrequency oscillator - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a multi-frequency oscillator suitable for SSQ transmitters.

Conventionally, in order to stably receive a large number of stations in SSP receivers, a spot reception method using a crystal oscillator dedicated to each station has been widely used.

However, with this method, as the reception frequency increases, a large number of expensive crystal oscillators must be prepared, and the associated switching circuits also become complicated.

For this reason, in recent years, a so-called synthesizer system has come into use, which generates a wide variety of frequencies by combining the outputs of a small number of stable ice crystal oscillators.

However, with this method, unnecessary radiation (hereinafter referred to as spurious) generated during frequency synthesis poses a problem.

The present invention provides a synthesizer oscillator that aims to suppress the emission of spurious frequencies as much as possible without narrowing the intended frequency band.

A conventional device will be explained with reference to FIG.

1 is a crystal oscillator with a stable frequency, and 2 is a phase-locked loop oscillator (hereinafter referred to as a PLL oscillator).

This oscillator 2 includes a phase comparator 4 that generates a voltage according to the phase difference between the output of the crystal oscillator 1 and the output of a frequency divider 3 whose frequency division ratio is variable, and a phase comparator 4 that generates a voltage according to the voltage of the phase comparator 4. The frequency converter 7 mixes this output with the output of the oscillator 6 and supplies the difference frequency output to the frequency divider 3.

8 is a frequency converter that mixes the output of the voltage controlled oscillator 5 and the output of the oscillator 6 to create a frequency of the sum of these, 9 is a PLL oscillator having the same function as 2, and 10 is a variable frequency divider. 11 is a phase comparator, 12 is a voltage controlled oscillator,
13 is a frequency converter.

14 is a crystal oscillator that oscillates a reference frequency, and its output is supplied to the reference frequency input terminal of the phase comparator 11.

Further, the output of the frequency converter 8 is supplied to one input terminal of the frequency converter 13.

The output terminal is taken from the voltage controlled oscillator 12.

Strictly speaking, the phase comparators 4 and 11 include low-pass filters, but the explanation is omitted.

The operation of the above device will be explained using specific numerical values.

The reference frequency supplied from the crystal oscillator 1 to the phase comparator 4 is 100 Hz.

Voltage controlled oscillator 5 controlled by the output voltage of phase comparator 4
The output frequency is 32.3750~32.4749M H
2, and the frequency can be selected in increments of 100 Hz.

The output frequency of oscillator 6 is 32 MHz.

The frequency converter 7 is a 32MHz voltage controlled oscillator 5.
The difference between the two outputs is 375.0 to 474.9k.
Hz and supplies it to the variable frequency divider 3.

The frequency division ratio of the variable frequency divider is selected from 3750 to 4749, and the output of the frequency converter 7 is divided up to 100H2 and supplied to the phase comparator 4.

The phase comparator 4 detects the phase shift of the variable frequency divider output with respect to the reference frequency output of 100 Hz and increases or decreases the output voltage.

Accordingly, the phase of the output of the voltage controlled oscillator 5 changes slightly, and as a result, the output phase of the variable splitter 3 also changes slightly and approaches the phase of the reference frequency.

In this way, the phase of the output frequency of the PLL oscillator is accurately regulated by the phase of the crystal oscillator 1, so that it functions as a highly stable variable oscillator.

The output of PLL oscillator 2 is summed with the output of oscillator 6 by frequency converter 8, and the frequency of the output signal is 64.375.
The frequency ranges from 0 to 64.4749 MHz.

A stable signal with a reference frequency of 100 kHz is supplied from a crystal oscillator 14 to a phase comparator 11 of the PLL oscillator 9.

The phase comparator 11 performs the same operation as the comparator 4 of the PLLM oscillator 2 described above, and its output voltage is
control the output phase of

A signal used in an external circuit appears at the output terminal of the voltage controlled oscillator 12, and this frequency ranges from 69.3750 to 99.
．． 4749MHz, which can be selected in 100Hz increments.

This output is mixed with the output of frequency converter 8 in frequency converter 13 to produce a difference frequency signal (5 to 34.9 MHz).
is taken out and supplied to the variable frequency divider 10.

Since the frequency division ratio of the variable divider 10 is set to 50 to 349, its output is 100kHz.

The phase comparator 11 connects the output of the variable frequency divider 10 and the crystal oscillator 1.
The voltage controlled oscillator 5 is controlled by comparing the output voltage of the oscillator 4 and the output voltage of the oscillator 4 to generate an output voltage such that the phases of both outputs match exactly.

Generally, if a spurious frequency generated by a frequency converter exists within a range of (conversion output frequency)±(band frequency of the PLL oscillation circuit, ie, cutoff frequency of the wave absorber), its influence cannot be ignored.

The cutoff frequency of a filter is usually indicated as a 3dB drop point, but this is insufficient for spurious and is approximately 59dB.
The frequency of the B drop point is considered to be the standard.

This frequency is approximately the reference frequency (100k in the case of Figure 1)
Hz).

The spurious frequencies at which the output of the frequency converter 13 in FIG.

32.2 21.5 16.1 12.9 s 32.2749 (2F□-F2) 21-4749 (3F 12F 2) 16.1 (4F1-3F2) 12.8749 (5F 14F 2) There are four points.

Here, Fl: Output frequency of the frequency converter 8 F2: Output frequency of the voltage controlled oscillator 12 Fo Output frequency F of the two-body frequency converter 3, 3=F of the spurious frequencies generated from the frequency converter 13.

(according to the spurious calculation table).

These F's are all F's.

Since it exists within ±100kHz, it cannot be removed.

Incidentally, spurious frequencies generated from the frequency converters 7 and 8 are removed by the filtering action of the PLL oscillators 2 and 9.

As can be easily understood, the output frequency F of the frequency converter.

The wider the band, the greater the probability that the spurious frequency and the converted output frequency will approach.

Conversely, the narrower the distance, the less the influence of spurious signals.

However, if the output bandwidth of the frequency converter is narrowed, the output of the voltage controlled oscillator 12, that is, the usable frequency band will also be narrowed.

The present invention aims to eliminate the influence of spurious signals without narrowing the usable frequency band.

Next, this will be explained with reference to FIG. Components in FIG. 2 with the same numbers as those in FIG. 1 have the same functions, and their explanation will be omitted.

The difference between FIG. 1 and FIG. 2 is that the output of a separately provided PLL oscillator 15 capable of wideband multi-step switching is introduced as a mixing input to the frequency converter 8.

The PLL oscillator 15 includes a phase comparator 18 for the output of the crystal oscillator 16 (5 MHz) and the output of the variable frequency divider 17 (dividing ratio 7 to 12), and is controlled by the voltage thereof to generate an output signal (frequency 35 to 60 MHz). and a voltage controlled oscillator 19 that supplies frequency converter 8 (set at 5 MHz intervals) to frequency converter 8, and its operation is the same as that of PLL oscillator 2.9 described above.

However, this oscillator 15 does not include a frequency converter that causes spurious frequencies, and the oscillator 1
It is noteworthy that the frequency No. 6 is selected to be a sufficiently low frequency compared to the intended frequency band, and that the frequency division ratio of the variable divider 17 is set to be as wide as the intended frequency band. It is possible.

Since the present invention is configured in this way, the output frequency of the frequency converter 8 is close to the frequency used and has a wide band, 67.3750 to 67.4749 72.3750 to 72.4749 92.3750 to 92.4749 It is set every 100Hz.

Also, the output (usage frequency) of the voltage controlled oscillator 12 is 69.
It is set every 100 Hz from 3750 to 99.4749 MHz, and also has a band of about 30 MHz.

In comparison, the output of the frequency converter 13 is 2 to 6.9 MHz.
The one in Figure 1 is 5 to 34.9MHz and about 30M.
Compared to a wide band of Hz, it was possible to reduce the frequency to one-sixth at about 5 MHz, and to increase the difference from the input frequency.

Furthermore, the frequency division ratio of the variable divider 20 can be reduced to 20-69, which is the ratio shown in FIG. 1 (50-349).

Now, according to the configuration shown in FIG. 2, the inputs F□ and F2 of the frequency converter 13 are selected to have frequencies closer to each other than in the case shown in FIG. .

has a narrower frequency band than that shown in FIG.

Therefore, the spurious frequency FT (for example I□-F2) and the output frequency F described as an example on page 5.

There is a big difference between F. ±100kHz << Fs, and is hardly affected by spurious.

As mentioned above, in this proposal, the wide band setting uses a stable PLL oscillation circuit that does not include a frequency converter,
By obtaining a multi-step switching output at a sufficiently lower frequency than the intended frequency band, the output of the frequency converter 13 becomes a narrow band, and by increasing the difference from the output frequency, the frequency band to be used is not narrowed. To obtain the advantage that spurious characteristics can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional device, and FIG. 2 is a block diagram of the proposed device.

Claims (1)

[Scope of utility model registration request] A first PLL oscillator 2 which has a reference frequency oscillator 1 for frequency selection and outputs an output frequency in a narrower band than the output of the second PLL oscillator 15 described below, and a reference frequency oscillator 16 for frequency band selection. A second PLL oscillator 15 outputs an output frequency with a variable width in at least the same band as the intended frequency band, and a second PLL oscillator 15 which mixes the outputs of the first and second variable frequency oscillators to generate an output frequency close to the intended frequency. A first frequency converter 8 that generates one frequency group, and the output of the first frequency converter 8 and the output of the voltage controlled oscillator 12 that generates the above-mentioned intended frequency are mixed and the difference frequency is calculated. Compare the phases of the second frequency converter 13 to output, the variable frequency divider 20 of the output, the stable reference frequency oscillator 14, and the output of the reference frequency oscillator 14 and the output of the variable frequency divider 20. A phase comparator 11 that generates a voltage according to the phase difference.
and a voltage controlled oscillator 12 that generates a frequency of use according to its output, and the output frequency band of the frequency converter 13 is determined by mixing the output of the voltage controlled oscillator 12 and the output of the frequency oscillator 8. A multi-frequency oscillator in a high frequency band, in which the frequency of the reference frequency oscillator 16 is set so as to have a sufficiently low frequency narrow band compared to the spurious frequencies.