JPS6213849B2 - - Google Patents

Info

Publication number
JPS6213849B2
JPS6213849B2 JP2269880A JP2269880A JPS6213849B2 JP S6213849 B2 JPS6213849 B2 JP S6213849B2 JP 2269880 A JP2269880 A JP 2269880A JP 2269880 A JP2269880 A JP 2269880A JP S6213849 B2 JPS6213849 B2 JP S6213849B2
Authority
JP
Japan
Prior art keywords
delay
circuit
type flip
flops
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2269880A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56120223A (en
Inventor
Kaneichi Ootsuki
Sumio Furukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP2269880A priority Critical patent/JPS56120223A/ja
Publication of JPS56120223A publication Critical patent/JPS56120223A/ja
Publication of JPS6213849B2 publication Critical patent/JPS6213849B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Static Random-Access Memory (AREA)
JP2269880A 1980-02-27 1980-02-27 Timing forming circuit Granted JPS56120223A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2269880A JPS56120223A (en) 1980-02-27 1980-02-27 Timing forming circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2269880A JPS56120223A (en) 1980-02-27 1980-02-27 Timing forming circuit

Publications (2)

Publication Number Publication Date
JPS56120223A JPS56120223A (en) 1981-09-21
JPS6213849B2 true JPS6213849B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-03-30

Family

ID=12090084

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2269880A Granted JPS56120223A (en) 1980-02-27 1980-02-27 Timing forming circuit

Country Status (1)

Country Link
JP (1) JPS56120223A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Also Published As

Publication number Publication date
JPS56120223A (en) 1981-09-21

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