JPS62126841U - - Google Patents
Info
- Publication number
- JPS62126841U JPS62126841U JP1257586U JP1257586U JPS62126841U JP S62126841 U JPS62126841 U JP S62126841U JP 1257586 U JP1257586 U JP 1257586U JP 1257586 U JP1257586 U JP 1257586U JP S62126841 U JPS62126841 U JP S62126841U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- chip
- insulating film
- wiring pattern
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 claims 1
- 238000004806 packaging method and process Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Semiconductor Integrated Circuits (AREA)
Description
第１図は本考案の半導体装置の要部断面図、第
２図は第１図のＩＣチツプ側からみた要部の俯敢
図、第３図は第１図とは異なる実施例を示した半
導体装置の要部断面図である。 １，１ａ…シリコン基板、２，２ａ…絶縁膜、
３，３ａ…電源線、４…接地線、５…コンタクト
孔、６…バンプ、７…ＩＣチツプ、８…凹部。
２図は第１図のＩＣチツプ側からみた要部の俯敢
図、第３図は第１図とは異なる実施例を示した半
導体装置の要部断面図である。 １，１ａ…シリコン基板、２，２ａ…絶縁膜、
３，３ａ…電源線、４…接地線、５…コンタクト
孔、６…バンプ、７…ＩＣチツプ、８…凹部。
Claims (1)
- シリコン基板の主面を被覆する絶縁膜上に形成
した配線パターンとＩＣチツプに設けたバンプと
をボンデイングしてなる半導体装置であつて、前
記配線パターンのうち電源線と接地線のいずれか
一方を、前記絶縁膜に開けたコンタクト孔を通し
て、前記基板に接続することにより形成されたコ
ンデンサ部の上方に、前記ＩＣチツプを配したこ
とを特徴とする高密度実装半導体装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1257586U JPS62126841U (ja) | 1986-01-31 | 1986-01-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1257586U JPS62126841U (ja) | 1986-01-31 | 1986-01-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62126841U true JPS62126841U (ja) | 1987-08-12 |
Family
ID=30800832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1257586U Pending JPS62126841U (ja) | 1986-01-31 | 1986-01-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62126841U (ja) |
-
1986
- 1986-01-31 JP JP1257586U patent/JPS62126841U/ja active Pending