JPS617656A - マルチチップパッケ−ジ - Google Patents
マルチチップパッケ−ジInfo
- Publication number
- JPS617656A JPS617656A JP59128918A JP12891884A JPS617656A JP S617656 A JPS617656 A JP S617656A JP 59128918 A JP59128918 A JP 59128918A JP 12891884 A JP12891884 A JP 12891884A JP S617656 A JPS617656 A JP S617656A
- Authority
- JP
- Japan
- Prior art keywords
- pad
- wiring
- substrate
- seal ring
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/60—Seals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59128918A JPS617656A (ja) | 1984-06-22 | 1984-06-22 | マルチチップパッケ−ジ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59128918A JPS617656A (ja) | 1984-06-22 | 1984-06-22 | マルチチップパッケ−ジ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS617656A true JPS617656A (ja) | 1986-01-14 |
| JPH0365662B2 JPH0365662B2 (enExample) | 1991-10-14 |
Family
ID=14996590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59128918A Granted JPS617656A (ja) | 1984-06-22 | 1984-06-22 | マルチチップパッケ−ジ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS617656A (enExample) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03113852U (enExample) * | 1990-03-09 | 1991-11-21 | ||
| US5280413A (en) * | 1992-09-17 | 1994-01-18 | Ceridian Corporation | Hermetically sealed circuit modules having conductive cap anchors |
| US5315486A (en) * | 1991-12-16 | 1994-05-24 | General Electric Company | Hermetically packaged HDI electronic system |
| US5359496A (en) * | 1989-12-21 | 1994-10-25 | General Electric Company | Hermetic high density interconnected electronic system |
| US7120069B2 (en) * | 1991-02-28 | 2006-10-10 | Hitachi, Ltd. | Electronic circuit package |
| JP2008502155A (ja) * | 2004-06-04 | 2008-01-24 | イーストマン コダック カンパニー | イメージセンサの金属配線 |
-
1984
- 1984-06-22 JP JP59128918A patent/JPS617656A/ja active Granted
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5359496A (en) * | 1989-12-21 | 1994-10-25 | General Electric Company | Hermetic high density interconnected electronic system |
| JPH03113852U (enExample) * | 1990-03-09 | 1991-11-21 | ||
| US7120069B2 (en) * | 1991-02-28 | 2006-10-10 | Hitachi, Ltd. | Electronic circuit package |
| US5315486A (en) * | 1991-12-16 | 1994-05-24 | General Electric Company | Hermetically packaged HDI electronic system |
| US5280413A (en) * | 1992-09-17 | 1994-01-18 | Ceridian Corporation | Hermetically sealed circuit modules having conductive cap anchors |
| WO1994007350A1 (en) * | 1992-09-17 | 1994-03-31 | Ceridian Corporation | Hermetically sealed circuit modules having conductive cap anchors |
| JP2008502155A (ja) * | 2004-06-04 | 2008-01-24 | イーストマン コダック カンパニー | イメージセンサの金属配線 |
| JP4856064B2 (ja) * | 2004-06-04 | 2012-01-18 | オムニヴィジョン テクノロジーズ インコーポレイテッド | イメージセンサの金属配線 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0365662B2 (enExample) | 1991-10-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |