JPS6159558A - Ｄｍａ診断方式 - Google Patents

Ｄｍａ診断方式

Info

Publication number
JPS6159558A
JPS6159558A JP59181158A JP18115884A JPS6159558A JP S6159558 A JPS6159558 A JP S6159558A JP 59181158 A JP59181158 A JP 59181158A JP 18115884 A JP18115884 A JP 18115884A JP S6159558 A JPS6159558 A JP S6159558A
Authority
JP
Japan
Prior art keywords
dma
data
main memory
register
dmac
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59181158A
Other languages
English (en)
Japanese (ja)
Other versions
JPH022176B2 (enExample
Inventor
Toshiharu Oshima
大島　俊春
Toshihiro Sakai
酒井　利弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59181158A priority Critical patent/JPS6159558A/ja
Publication of JPS6159558A publication Critical patent/JPS6159558A/ja
Publication of JPH022176B2 publication Critical patent/JPH022176B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP59181158A 1984-08-30 1984-08-30 Ｄｍａ診断方式 Granted JPS6159558A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59181158A JPS6159558A (ja) 1984-08-30 1984-08-30 Ｄｍａ診断方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59181158A JPS6159558A (ja) 1984-08-30 1984-08-30 Ｄｍａ診断方式

Publications (2)

Publication Number Publication Date
JPS6159558A true JPS6159558A (ja) 1986-03-27
JPH022176B2 JPH022176B2 (enExample) 1990-01-17

Family

ID=16095900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59181158A Granted JPS6159558A (ja) 1984-08-30 1984-08-30 Ｄｍａ診断方式

Country Status (1)

Country Link
JP (1) JPS6159558A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996020409A1 (en) * 1994-12-28 1996-07-04 Advantest Corporation High-speed test-pattern transfer apparatus for semiconductor testing
US7703619B2 (en) 2003-01-13 2010-04-27 H.J. Heinz Holding B.V. Package with peel-off closure
US9061796B2 (en) 2009-04-23 2015-06-23 H.J. Heinz Company Multi-function condiment container
JP2015212969A (ja) * 2015-07-09 2015-11-26 トヨタ自動車株式会社 情報処理装置およびｄｍａコントローラの動作確認方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858630A (ja) * 1981-10-05 1983-04-07 Toshiba Corp 集中制御システムにおけるｄｍａ機能診断方法
JPS5916067A (ja) * 1982-07-20 1984-01-27 Fujitsu Ltd デ−タチエツク方式

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858630A (ja) * 1981-10-05 1983-04-07 Toshiba Corp 集中制御システムにおけるｄｍａ機能診断方法
JPS5916067A (ja) * 1982-07-20 1984-01-27 Fujitsu Ltd デ−タチエツク方式

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996020409A1 (en) * 1994-12-28 1996-07-04 Advantest Corporation High-speed test-pattern transfer apparatus for semiconductor testing
US5796753A (en) * 1994-12-28 1998-08-18 Advantest Corp. High speed test pattern transfer apparatus for semiconductor test system
US7703619B2 (en) 2003-01-13 2010-04-27 H.J. Heinz Holding B.V. Package with peel-off closure
US9061796B2 (en) 2009-04-23 2015-06-23 H.J. Heinz Company Multi-function condiment container
JP2015212969A (ja) * 2015-07-09 2015-11-26 トヨタ自動車株式会社 情報処理装置およびｄｍａコントローラの動作確認方法

Also Published As

Publication number Publication date
JPH022176B2 (enExample) 1990-01-17

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