JPS6154290B2 - - Google Patents

Info

Publication number
JPS6154290B2
JPS6154290B2 JP53056762A JP5676278A JPS6154290B2 JP S6154290 B2 JPS6154290 B2 JP S6154290B2 JP 53056762 A JP53056762 A JP 53056762A JP 5676278 A JP5676278 A JP 5676278A JP S6154290 B2 JPS6154290 B2 JP S6154290B2
Authority
JP
Japan
Prior art keywords
array
wiring
output
logic
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53056762A
Other languages
English (en)
Japanese (ja)
Other versions
JPS54148360A (en
Inventor
Akira Aso
Hiromichi Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5676278A priority Critical patent/JPS54148360A/ja
Publication of JPS54148360A publication Critical patent/JPS54148360A/ja
Publication of JPS6154290B2 publication Critical patent/JPS6154290B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
JP5676278A 1978-05-12 1978-05-12 Logic array circuit Granted JPS54148360A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5676278A JPS54148360A (en) 1978-05-12 1978-05-12 Logic array circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5676278A JPS54148360A (en) 1978-05-12 1978-05-12 Logic array circuit

Publications (2)

Publication Number Publication Date
JPS54148360A JPS54148360A (en) 1979-11-20
JPS6154290B2 true JPS6154290B2 (cg-RX-API-DMAC7.html) 1986-11-21

Family

ID=13036498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5676278A Granted JPS54148360A (en) 1978-05-12 1978-05-12 Logic array circuit

Country Status (1)

Country Link
JP (1) JPS54148360A (cg-RX-API-DMAC7.html)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3975623A (en) * 1974-12-30 1976-08-17 Ibm Corporation Logic array with multiple readout tables
US3987287A (en) * 1974-12-30 1976-10-19 International Business Machines Corporation High density logic array

Also Published As

Publication number Publication date
JPS54148360A (en) 1979-11-20

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