JPS6154247B2 - - Google Patents

Info

Publication number
JPS6154247B2
JPS6154247B2 JP54138547A JP13854779A JPS6154247B2 JP S6154247 B2 JPS6154247 B2 JP S6154247B2 JP 54138547 A JP54138547 A JP 54138547A JP 13854779 A JP13854779 A JP 13854779A JP S6154247 B2 JPS6154247 B2 JP S6154247B2
Authority
JP
Japan
Prior art keywords
alignment
silicon substrate
oxide film
silicon
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54138547A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5662324A (en
Inventor
Yoshihiro Maeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suwa Seikosha KK
Original Assignee
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suwa Seikosha KK filed Critical Suwa Seikosha KK
Priority to JP13854779A priority Critical patent/JPS5662324A/ja
Publication of JPS5662324A publication Critical patent/JPS5662324A/ja
Publication of JPS6154247B2 publication Critical patent/JPS6154247B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
JP13854779A 1979-10-26 1979-10-26 Semiconductor device position fitting method Granted JPS5662324A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13854779A JPS5662324A (en) 1979-10-26 1979-10-26 Semiconductor device position fitting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13854779A JPS5662324A (en) 1979-10-26 1979-10-26 Semiconductor device position fitting method

Publications (2)

Publication Number Publication Date
JPS5662324A JPS5662324A (en) 1981-05-28
JPS6154247B2 true JPS6154247B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1986-11-21

Family

ID=15224695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13854779A Granted JPS5662324A (en) 1979-10-26 1979-10-26 Semiconductor device position fitting method

Country Status (1)

Country Link
JP (1) JPS5662324A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5967632A (ja) * 1982-10-12 1984-04-17 Oki Electric Ind Co Ltd ウエハ−アライメントマ−クの保存方法
JPS59172722A (ja) * 1983-03-23 1984-09-29 Oki Electric Ind Co Ltd アライメントマ−クの製造方法
JPS60110224U (ja) * 1983-12-28 1985-07-26 三菱樹脂株式会社 蓋付容器
JPH0494522A (ja) * 1990-08-10 1992-03-26 Mitsubishi Electric Corp アライメイト・マーク構造

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5123609Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1971-04-09 1976-06-17
JPS5459889A (en) * 1977-10-21 1979-05-14 Hitachi Ltd Semiconductor device

Also Published As

Publication number Publication date
JPS5662324A (en) 1981-05-28

Similar Documents

Publication Publication Date Title
EP0212219B1 (en) Visibility enhancement of first order alignment marks
JP2803734B2 (ja) 集積回路形成方法
US5982044A (en) Alignment pattern and algorithm for photolithographic alignment marks on semiconductor substrates
JPH0210716A (ja) アライメント・マークの形成方法及びアライテント・マークを有する半導体ウエハ
JP2890538B2 (ja) 半導体装置
JP2650182B2 (ja) 位置合せマーク並びに該マークを有する電子装置及びその製造方法
JPS6154247B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS627692B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS63119528A (ja) 半導体装置の製造方法
JPS6211491B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR100356014B1 (ko) 정렬 마크 제조 방법
JPS5856334A (ja) 位置合わせマ−ク
JPH1154607A (ja) 半導体装置の製造方法
JPH07211610A (ja) 半導体装置およびその製造方法
JP2758595B2 (ja) 三層レジスト構造
JPH03142820A (ja) 半導体装置の製造方法
JPS6210009B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPH05129179A (ja) 半導体装置の製造方法
JPH01272133A (ja) 半導体装置
JPH07111231A (ja) 半導体装置およびその製造方法
JPH06177027A (ja) 電子ビーム描画方法及び半導体装置
JP2000021710A (ja) 半導体装置の製造方法およびフォトマスクの位置合わせ方法
JPH0544175B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS62131515A (ja) 粒子ビ−ム露光用位置合せマ−ク
JPS63197336A (ja) 位置合せマ−ク