JPS6150360B2 - - Google Patents

Info

Publication number
JPS6150360B2
JPS6150360B2 JP9993881A JP9993881A JPS6150360B2 JP S6150360 B2 JPS6150360 B2 JP S6150360B2 JP 9993881 A JP9993881 A JP 9993881A JP 9993881 A JP9993881 A JP 9993881A JP S6150360 B2 JPS6150360 B2 JP S6150360B2
Authority
JP
Japan
Prior art keywords
address
register
input
circuits
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9993881A
Other languages
English (en)
Japanese (ja)
Other versions
JPS581262A (ja
Inventor
Shigeo Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9993881A priority Critical patent/JPS581262A/ja
Publication of JPS581262A publication Critical patent/JPS581262A/ja
Publication of JPS6150360B2 publication Critical patent/JPS6150360B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Image Input (AREA)
JP9993881A 1981-06-27 1981-06-27 メモリアドレス制御方式 Granted JPS581262A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9993881A JPS581262A (ja) 1981-06-27 1981-06-27 メモリアドレス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9993881A JPS581262A (ja) 1981-06-27 1981-06-27 メモリアドレス制御方式

Publications (2)

Publication Number Publication Date
JPS581262A JPS581262A (ja) 1983-01-06
JPS6150360B2 true JPS6150360B2 (enrdf_load_stackoverflow) 1986-11-04

Family

ID=14260650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9993881A Granted JPS581262A (ja) 1981-06-27 1981-06-27 メモリアドレス制御方式

Country Status (1)

Country Link
JP (1) JPS581262A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60122441A (ja) * 1983-12-07 1985-06-29 Fujitsu Ltd メモリアクセス方式
JPH0766438B2 (ja) * 1986-04-25 1995-07-19 日本電気株式会社 画像記憶装置
JPS636645A (ja) * 1986-06-27 1988-01-12 Nec Corp 二次元メモリアドレスアサイン方式
JP2932714B2 (ja) * 1991-02-13 1999-08-09 松下電器産業株式会社 アドレス生成装置

Also Published As

Publication number Publication date
JPS581262A (ja) 1983-01-06

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