JPH035620B2 - - Google Patents

Info

Publication number
JPH035620B2
JPH035620B2 JP58081167A JP8116783A JPH035620B2 JP H035620 B2 JPH035620 B2 JP H035620B2 JP 58081167 A JP58081167 A JP 58081167A JP 8116783 A JP8116783 A JP 8116783A JP H035620 B2 JPH035620 B2 JP H035620B2
Authority
JP
Japan
Prior art keywords
address
translation
register
conversion
real
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58081167A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59207082A (ja
Inventor
Yoichi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58081167A priority Critical patent/JPS59207082A/ja
Publication of JPS59207082A publication Critical patent/JPS59207082A/ja
Publication of JPH035620B2 publication Critical patent/JPH035620B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP58081167A 1983-05-10 1983-05-10 アドレス変換装置 Granted JPS59207082A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58081167A JPS59207082A (ja) 1983-05-10 1983-05-10 アドレス変換装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58081167A JPS59207082A (ja) 1983-05-10 1983-05-10 アドレス変換装置

Publications (2)

Publication Number Publication Date
JPS59207082A JPS59207082A (ja) 1984-11-24
JPH035620B2 true JPH035620B2 (enrdf_load_stackoverflow) 1991-01-28

Family

ID=13738898

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58081167A Granted JPS59207082A (ja) 1983-05-10 1983-05-10 アドレス変換装置

Country Status (1)

Country Link
JP (1) JPS59207082A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6010382A (ja) * 1983-06-30 1985-01-19 Toshiba Corp 中央処理装置
US5329629A (en) * 1989-07-03 1994-07-12 Tandem Computers Incorporated Apparatus and method for reading, writing, and refreshing memory with direct virtual or physical access

Also Published As

Publication number Publication date
JPS59207082A (ja) 1984-11-24

Similar Documents

Publication Publication Date Title
US4004278A (en) System for switching multiple virtual spaces
JPH0137773B2 (enrdf_load_stackoverflow)
JP3199465B2 (ja) 情報処理装置
US5226132A (en) Multiple virtual addressing using/comparing translation pairs of addresses comprising a space address and an origin address (sto) while using space registers as storage devices for a data processing system
JPH035620B2 (enrdf_load_stackoverflow)
JP3190700B2 (ja) アドレス変換装置
JP2771374B2 (ja) プロセッサのページ越処理方式
JPH0246970B2 (ja) Memorikakuchohoshiki
JP3147355B2 (ja) アドレス変換装置
JP2559398B2 (ja) 仮想計算機システム
JPH0679296B2 (ja) 多重仮想アドレス空間アクセス方法およびデータ処理装置
JPH0439099B2 (enrdf_load_stackoverflow)
JPH02168332A (ja) データ処理装置
JPS59207081A (ja) アドレス変換装置
JPS60117351A (ja) アドレス変換装置
JPH0553916A (ja) アドレス変換装置
JP2560520B2 (ja) 先行制御装置
JP3118802B2 (ja) 分岐ヒストリテーブルを用いたデバッグ回路
JPH0573424A (ja) 高速アドレス変換方式
JPH05225063A (ja) バッファメモリのクリア方式
JPH03168853A (ja) 入出力処理装置
JPH06332867A (ja) バス・インタフェース内部バッファ制御方式
JPS63189955A (ja) 仮想計算機システムにおけるデ−タ転送処理方式
JPH08235071A (ja) 仮想計算機システム
JPH0553915A (ja) アドレス変換装置