JPS6142348B2 - - Google Patents
Info
- Publication number
- JPS6142348B2 JPS6142348B2 JP56155100A JP15510081A JPS6142348B2 JP S6142348 B2 JPS6142348 B2 JP S6142348B2 JP 56155100 A JP56155100 A JP 56155100A JP 15510081 A JP15510081 A JP 15510081A JP S6142348 B2 JPS6142348 B2 JP S6142348B2
- Authority
- JP
- Japan
- Prior art keywords
- memory cell
- inverse
- discharge current
- current
- emitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/415—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Semiconductor Memories (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56155100A JPS5857691A (ja) | 1981-09-30 | 1981-09-30 | 半導体メモリ |
| US06/425,649 US4488268A (en) | 1981-09-29 | 1982-09-28 | Semiconductor memory |
| EP82305106A EP0077144B1 (en) | 1981-09-29 | 1982-09-28 | Multi-emitter transistor memory device with word-line discharge current source |
| DE8282305106T DE3268848D1 (en) | 1981-09-29 | 1982-09-28 | Multi-emitter transistor memory device with word-line discharge current source |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56155100A JPS5857691A (ja) | 1981-09-30 | 1981-09-30 | 半導体メモリ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5857691A JPS5857691A (ja) | 1983-04-05 |
| JPS6142348B2 true JPS6142348B2 (enExample) | 1986-09-20 |
Family
ID=15598621
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56155100A Granted JPS5857691A (ja) | 1981-09-29 | 1981-09-30 | 半導体メモリ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5857691A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20250107433A (ko) * | 2024-01-05 | 2025-07-14 | 이재홍 | 진공 배관용 클램프 |
| KR20250111886A (ko) * | 2024-01-16 | 2025-07-23 | 이재홍 | 진공 배관용 클램프 |
-
1981
- 1981-09-30 JP JP56155100A patent/JPS5857691A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20250107433A (ko) * | 2024-01-05 | 2025-07-14 | 이재홍 | 진공 배관용 클램프 |
| KR20250111886A (ko) * | 2024-01-16 | 2025-07-23 | 이재홍 | 진공 배관용 클램프 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5857691A (ja) | 1983-04-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4809224A (en) | Read only memory device with memory cells each storing one of three states | |
| JPS5847792B2 (ja) | ビット線制御回路 | |
| JPH02282995A (ja) | 半導体記憶装置 | |
| JPS6160517B2 (enExample) | ||
| JPH06325573A (ja) | 半導体メモリ | |
| JPS6142348B2 (enExample) | ||
| CA1282493C (en) | Variable clamped memory cell | |
| US5251173A (en) | High-speed, low DC power, PNP-loaded word line decorder/driver circuit | |
| JP3113103B2 (ja) | スタティックramセル | |
| US6285602B1 (en) | Semiconductor memory device provided with I/O clamp circuit | |
| JPH0152834B2 (enExample) | ||
| JPS6249677B2 (enExample) | ||
| JPS6047667B2 (ja) | 記憶装置 | |
| JPH0334191A (ja) | スタティック型半導体メモリ | |
| JP3101282B2 (ja) | 半導体記憶装置 | |
| JP3153400B2 (ja) | 半導体メモリ及びセンス回路 | |
| JPH03116490A (ja) | スタティックram | |
| JPS58147889A (ja) | 半導体装置 | |
| JP2940127B2 (ja) | 半導体装置 | |
| JPS5845115B2 (ja) | 半導体メモリ書込回路 | |
| Nakase et al. | A 2-ns 16K bipolar ECL RAM with reduced word-line voltage swing | |
| JPS62140295A (ja) | バイポーラramセル | |
| JPS593791A (ja) | 半導体記憶回路 | |
| JPH06325577A (ja) | 半導体記憶装置 | |
| JPS6214918B2 (enExample) |