JPS6128198B2 - - Google Patents
Info
- Publication number
- JPS6128198B2 JPS6128198B2 JP53014426A JP1442678A JPS6128198B2 JP S6128198 B2 JPS6128198 B2 JP S6128198B2 JP 53014426 A JP53014426 A JP 53014426A JP 1442678 A JP1442678 A JP 1442678A JP S6128198 B2 JPS6128198 B2 JP S6128198B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- memory
- output
- gate
- true
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000295 complement effect Effects 0.000 claims description 7
- 239000011159 matrix material Substances 0.000 description 3
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1442678A JPS54107228A (en) | 1978-02-09 | 1978-02-09 | Memory circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1442678A JPS54107228A (en) | 1978-02-09 | 1978-02-09 | Memory circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54107228A JPS54107228A (en) | 1979-08-22 |
JPS6128198B2 true JPS6128198B2 (ru) | 1986-06-28 |
Family
ID=11860689
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1442678A Granted JPS54107228A (en) | 1978-02-09 | 1978-02-09 | Memory circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54107228A (ru) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0510744B2 (ru) * | 1984-09-29 | 1993-02-10 | Sony Corp | |
JPH0514983B2 (ru) * | 1984-09-29 | 1993-02-26 | Sony Corp | |
US11772231B2 (en) | 2016-07-29 | 2023-10-03 | Sumco Corporation | Double-sided wafer polishing method |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5948892A (ja) * | 1982-09-14 | 1984-03-21 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
JPS5963482U (ja) * | 1982-10-21 | 1984-04-26 | シャープ株式会社 | キヤビネツトの係止装置 |
JPS6076085A (ja) * | 1983-09-30 | 1985-04-30 | Toshiba Corp | 半導体記憶装置 |
JPS63201986A (ja) * | 1987-02-18 | 1988-08-22 | Matsushita Electric Ind Co Ltd | 2ポ−トメモリ |
JPH01205790A (ja) * | 1988-02-10 | 1989-08-18 | Ricoh Co Ltd | スタティックram |
EP0473819A1 (en) * | 1990-09-05 | 1992-03-11 | International Business Machines Corporation | Multiport memory cell |
CN1265346C (zh) | 2001-09-28 | 2006-07-19 | 索尼公司 | 显示存储器、驱动器电路、显示器和便携式信息设备 |
JP4984828B2 (ja) * | 2006-10-31 | 2012-07-25 | 株式会社デンソー | 半導体メモリ回路装置 |
-
1978
- 1978-02-09 JP JP1442678A patent/JPS54107228A/ja active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0510744B2 (ru) * | 1984-09-29 | 1993-02-10 | Sony Corp | |
JPH0514983B2 (ru) * | 1984-09-29 | 1993-02-26 | Sony Corp | |
US11772231B2 (en) | 2016-07-29 | 2023-10-03 | Sumco Corporation | Double-sided wafer polishing method |
Also Published As
Publication number | Publication date |
---|---|
JPS54107228A (en) | 1979-08-22 |
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