JPS6123739U - D/A converter - Google Patents
D/A converterInfo
- Publication number
- JPS6123739U JPS6123739U JP10663284U JP10663284U JPS6123739U JP S6123739 U JPS6123739 U JP S6123739U JP 10663284 U JP10663284 U JP 10663284U JP 10663284 U JP10663284 U JP 10663284U JP S6123739 U JPS6123739 U JP S6123739U
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- input data
- converter
- frequency
- sampling frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の積分型D/Aコンバータの構成を示す
図、第2図はPCM記録再生システムの構成を示す図、
第3図は同、エイリアシング現象を示す図である。
6はデータ転送回路、7は積分型D/Aコンバータであ
る。FIG. 1 is a diagram showing the configuration of an integral type D/A converter of the present invention, FIG. 2 is a diagram showing the configuration of a PCM recording/reproducing system,
FIG. 3 is a diagram showing the aliasing phenomenon. 6 is a data transfer circuit, and 7 is an integral type D/A converter.
Claims (1)
供給され、当該入力データで与えられる数値に相当する
だけクロツク信号をカウントすることによって当該入力
データに比例した時間幅を得て、その期間一定電流を積
分して、上記入カデータに対応したアナログ電圧値を得
るようにしたD/Aコンバータにおいて、上記クロツク
信号の周波数foを ただし、f,データ転送クロツク信号の周波数 f5:入力データに対応する元のアナロ グ信号のサンプリング周波数 に設定したことを特徴とするD/Aコンバータ。[Claims for Utility Model Registration] Input data is supplied in synchronization with a predetermined data transfer clock signal, and the time width is proportional to the input data by counting the clock signal by the number corresponding to the numerical value given by the input data. In the D/A converter, the frequency fo of the clock signal is defined as f, and the frequency of the data transfer clock signal is f5: A D/A converter characterized in that the sampling frequency is set to the sampling frequency of the original analog signal corresponding to the input data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10663284U JPS6123739U (en) | 1984-07-13 | 1984-07-13 | D/A converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10663284U JPS6123739U (en) | 1984-07-13 | 1984-07-13 | D/A converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6123739U true JPS6123739U (en) | 1986-02-12 |
JPH0136364Y2 JPH0136364Y2 (en) | 1989-11-06 |
Family
ID=30665912
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10663284U Granted JPS6123739U (en) | 1984-07-13 | 1984-07-13 | D/A converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6123739U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5687926A (en) * | 1979-12-18 | 1981-07-17 | Matsushita Electric Ind Co Ltd | Digital signal processor |
-
1984
- 1984-07-13 JP JP10663284U patent/JPS6123739U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5687926A (en) * | 1979-12-18 | 1981-07-17 | Matsushita Electric Ind Co Ltd | Digital signal processor |
Also Published As
Publication number | Publication date |
---|---|
JPH0136364Y2 (en) | 1989-11-06 |
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