JPS6123739U - D/A converter - Google Patents

D/A converter

Info

Publication number
JPS6123739U
JPS6123739U JP10663284U JP10663284U JPS6123739U JP S6123739 U JPS6123739 U JP S6123739U JP 10663284 U JP10663284 U JP 10663284U JP 10663284 U JP10663284 U JP 10663284U JP S6123739 U JPS6123739 U JP S6123739U
Authority
JP
Japan
Prior art keywords
clock signal
input data
converter
frequency
sampling frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10663284U
Other languages
Japanese (ja)
Other versions
JPH0136364Y2 (en
Inventor
仁孝 半田
Original Assignee
オンキヨー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by オンキヨー株式会社 filed Critical オンキヨー株式会社
Priority to JP10663284U priority Critical patent/JPS6123739U/en
Publication of JPS6123739U publication Critical patent/JPS6123739U/en
Application granted granted Critical
Publication of JPH0136364Y2 publication Critical patent/JPH0136364Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の積分型Ｄ／Ａコンバータの構成を示す
図、第２図はＰＣＭ記録再生システムの構成を示す図、
第３図は同、エイリアシング現象を示す図である。 ６はデータ転送回路、７は積分型Ｄ／Ａコンバータであ
る。FIG. 1 is a diagram showing the configuration of an integral type D/A converter of the present invention, FIG. 2 is a diagram showing the configuration of a PCM recording/reproducing system,
FIG. 3 is a diagram showing the aliasing phenomenon. 6 is a data transfer circuit, and 7 is an integral type D/A converter.

Claims (1)

【実用新案登録請求の範囲】 所定のデータ転送クロツク信号に同期して入力データが
供給され、当該入力データで与えられる数値に相当する
だけクロツク信号をカウントすることによって当該入力
データに比例した時間幅を得て、その期間一定電流を積
分して、上記入カデータに対応したアナログ電圧値を得
るようにしたＤ／Ａコンバータにおいて、上記クロツク
信号の周波数ｆｏを ただし、ｆ，データ転送クロツク信号の周波数 ｆ５：入力データに対応する元のアナロ グ信号のサンプリング周波数 に設定したことを特徴とするＤ／Ａコンバータ。[Claims for Utility Model Registration] Input data is supplied in synchronization with a predetermined data transfer clock signal, and the time width is proportional to the input data by counting the clock signal by the number corresponding to the numerical value given by the input data. In the D/A converter, the frequency fo of the clock signal is defined as f, and the frequency of the data transfer clock signal is f5: A D/A converter characterized in that the sampling frequency is set to the sampling frequency of the original analog signal corresponding to the input data.
JP10663284U 1984-07-13 1984-07-13 D/A converter Granted JPS6123739U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10663284U JPS6123739U (en) 1984-07-13 1984-07-13 D/A converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10663284U JPS6123739U (en) 1984-07-13 1984-07-13 D/A converter

Publications (2)

Publication Number Publication Date
JPS6123739U true JPS6123739U (en) 1986-02-12
JPH0136364Y2 JPH0136364Y2 (en) 1989-11-06

Family

ID=30665912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10663284U Granted JPS6123739U (en) 1984-07-13 1984-07-13 D/A converter

Country Status (1)

Country Link
JP (1) JPS6123739U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5687926A (en) * 1979-12-18 1981-07-17 Matsushita Electric Ind Co Ltd Digital signal processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5687926A (en) * 1979-12-18 1981-07-17 Matsushita Electric Ind Co Ltd Digital signal processor

Also Published As

Publication number Publication date
JPH0136364Y2 (en) 1989-11-06

Similar Documents

Publication Publication Date Title
JPS6123739U (en) D/A converter
JPS5927632U (en) A/D converter
JPS6059635U (en) DA converter
JPS5827777U (en) Delay time measurement circuit
JPS59147197U (en) Reverberation effect device
JPS6140800U (en) Sample/hold circuit
JPS60132667U (en) Index signal recording device
JPS6135439U (en) Noise removal circuit
JPS6020087U (en) magnetic tape quantity meter
JPS61179830U (en)
JPS5986092U (en) tape recorder
JPS58109339U (en) Gate pulse generation circuit
JPH0163225U (en)
JPS5859239U (en) A/D converter
JPS5877943U (en) Multi-point sampling circuit
JPS6133547U (en) data transfer device
JPS60120589U (en) Stereo magnetic recording and playback device
JPS60169960U (en) Clock signal extraction circuit
JPS5863633U (en) clock control circuit
JPS60636U (en) multiplication circuit
JPS5984697U (en) Arithmetic circuit
JPS6079834U (en) Clock pulse detection circuit
JPS6093189U (en) Tape recorder level display device
JPS5998319U (en) Serial transmission recording device
JPS5978595U (en) Memory stop circuit