JPS60169947U - Parallel/serial conversion circuit - Google Patents

Parallel/serial conversion circuit

Info

Publication number
JPS60169947U
JPS60169947U JP5608184U JP5608184U JPS60169947U JP S60169947 U JPS60169947 U JP S60169947U JP 5608184 U JP5608184 U JP 5608184U JP 5608184 U JP5608184 U JP 5608184U JP S60169947 U JPS60169947 U JP S60169947U
Authority
JP
Japan
Prior art keywords
parallel
serial conversion
circuit
conversion circuit
counter circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5608184U
Other languages
Japanese (ja)
Inventor
増村 利行
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP5608184U priority Critical patent/JPS60169947U/en
Publication of JPS60169947U publication Critical patent/JPS60169947U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のパラレル/シリアル変換回路のブロック
図、第2図は第1図の回路の動作を示すタイミングチャ
ート、第3図は本考案によるパラレル/シリアル変換回
路の一実施例を示すブロック図、第4図は第3図の回路
の動作を示すタイミングチャートである。 1・・・・・・シフトレジスタ回路、2−−−−−−D
フリップフロップ回路、3・・・・・・マルチバイブレ
ータ回路、4・・・・・・カウンタ回路、5・曲・アン
ドゲート回路、6・・・・・・ナントゲート回路、7・
・・・・・インバータ回路、8・・・・・・データセレ
クタ回路。
Fig. 1 is a block diagram of a conventional parallel/serial conversion circuit, Fig. 2 is a timing chart showing the operation of the circuit in Fig. 1, and Fig. 3 is a block diagram showing an embodiment of the parallel/serial conversion circuit according to the present invention. 4 are timing charts showing the operation of the circuit shown in FIG. 3. 1...Shift register circuit, 2------D
Flip-flop circuit, 3...Multi-vibrator circuit, 4...Counter circuit, 5. Song/AND gate circuit, 6...Nant gate circuit, 7.
...Inverter circuit, 8...Data selector circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 制御信号のレベル変化によってクロック信号によるカウ
ントを開始しセレクト信号を出力するカウンタ回路と、
前記セレクト信号に応じてパラレルデータを順次シリア
ルデータとして出力するデータセレクタ回路と、前記カ
ウンタ回路が所定数までカウントすると前記クロック信
号の前記カウンタ回路への入力を禁止する手段とを有す
ることを特徴とするパラレル/シリアル変換回路。
a counter circuit that starts counting by a clock signal and outputs a select signal according to a change in the level of the control signal;
The data selector circuit sequentially outputs parallel data as serial data in response to the select signal, and means for inhibiting input of the clock signal to the counter circuit when the counter circuit counts up to a predetermined number. Parallel/serial conversion circuit.
JP5608184U 1984-04-17 1984-04-17 Parallel/serial conversion circuit Pending JPS60169947U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5608184U JPS60169947U (en) 1984-04-17 1984-04-17 Parallel/serial conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5608184U JPS60169947U (en) 1984-04-17 1984-04-17 Parallel/serial conversion circuit

Publications (1)

Publication Number Publication Date
JPS60169947U true JPS60169947U (en) 1985-11-11

Family

ID=30579349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5608184U Pending JPS60169947U (en) 1984-04-17 1984-04-17 Parallel/serial conversion circuit

Country Status (1)

Country Link
JP (1) JPS60169947U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129616A (en) * 1987-10-29 1989-05-22 Internatl Business Mach Corp <Ibm> Format converting circut

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516841B1 (en) * 1969-03-28 1976-03-02
JPS5133339B2 (en) * 1971-11-22 1976-09-18
JPS5354935A (en) * 1976-10-29 1978-05-18 Mitsubishi Electric Corp Information converting device
JPS57150034A (en) * 1981-03-11 1982-09-16 Fujitsu Ltd Information transfer device
JPS58169630A (en) * 1982-03-31 1983-10-06 Matsushita Electric Works Ltd Signal converting circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516841B1 (en) * 1969-03-28 1976-03-02
JPS5133339B2 (en) * 1971-11-22 1976-09-18
JPS5354935A (en) * 1976-10-29 1978-05-18 Mitsubishi Electric Corp Information converting device
JPS57150034A (en) * 1981-03-11 1982-09-16 Fujitsu Ltd Information transfer device
JPS58169630A (en) * 1982-03-31 1983-10-06 Matsushita Electric Works Ltd Signal converting circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01129616A (en) * 1987-10-29 1989-05-22 Internatl Business Mach Corp <Ibm> Format converting circut

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