JPS58109339U - Gate pulse generation circuit - Google Patents
Gate pulse generation circuitInfo
- Publication number
- JPS58109339U JPS58109339U JP16333582U JP16333582U JPS58109339U JP S58109339 U JPS58109339 U JP S58109339U JP 16333582 U JP16333582 U JP 16333582U JP 16333582 U JP16333582 U JP 16333582U JP S58109339 U JPS58109339 U JP S58109339U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- gate pulse
- generation circuit
- pulse generation
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来装置の回路図、第２図は本考案の具体的実
施例の回路図、第３図はタイムチャートである。
Ｂ：２進カウンタ、ＦＦ：Ｊ−にフリップフロップ回Ｌ
Ｇ：ゲート回路、Ｓ：シフトレジスタ、Ｔ：遅延回路
。FIG. 1 is a circuit diagram of a conventional device, FIG. 2 is a circuit diagram of a specific embodiment of the present invention, and FIG. 3 is a time chart. B: Binary counter, FF: Flip-flop times L to J-
G: gate circuit, S: shift register, T: delay circuit.
Claims (1)
回路において、複数個のゲート回路と、該ゲート回路の
出力ゲートパルスの時間幅に相当するステップ信号を前
記ゲート回路に供給するシフトレジスタと、前記ステッ
プ信号の時間幅に相当する出力のＱのみを前記ゲート回
路の各々に供給する２進カウンタとから成り、前記シフ
トレジスタは前記出力ゲートパルスをＣＬＫ入力とじて
受は前記ステップ信号を更新することを特徴とするゲー
トパルス発生回路。A gate pulse generation circuit that generates a gate signal that is time-dependent, including a plurality of gate circuits, and a shift register that supplies the gate circuit with a step signal corresponding to the time width of the output gate pulse of the gate circuit; and a binary counter that supplies only an output Q corresponding to the time width of the step signal to each of the gate circuits, and the shift register receives the output gate pulse as a CLK input and updates the step signal. A gate pulse generation circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16333582U JPS58109339U (en) | 1982-10-28 | 1982-10-28 | Gate pulse generation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16333582U JPS58109339U (en) | 1982-10-28 | 1982-10-28 | Gate pulse generation circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58109339U true JPS58109339U (en) | 1983-07-26 |
Family
ID=30102018
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16333582U Pending JPS58109339U (en) | 1982-10-28 | 1982-10-28 | Gate pulse generation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58109339U (en) |
-
1982
- 1982-10-28 JP JP16333582U patent/JPS58109339U/en active Pending
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