JPS593632U

JPS593632U - time delay circuit

Info

Publication number: JPS593632U
Application number: JP1982098520U
Authority: JP
Inventors: 博酒井
Original assignee: 松下電工株式会社
Priority date: 1982-06-30
Filing date: 1982-06-30
Publication date: 1984-01-11

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の時間遅れ回路の回路図、第２図ａ、　　
ｂは同上の動作タイムチャート、第３図は本考案の一実
施例の回路図、第４図ａ　−ｅは同上の動作タイムチャ
ート、第５図は同上のワンショット回路の回路図、第６
図は同上のクロックラッチ回路の回路図である。１・・・ワンショット回路、２−・・クロックラッチ回
路、３・・・ＮＯＲ回路。第４図　− 第５図Figure 1 is a circuit diagram of a conventional time delay circuit, Figure 2a,
FIG. 3 is a circuit diagram of an embodiment of the present invention; FIGS. 4 a - e are operation time charts of the same as the above; FIG. 5 is a circuit diagram of the one-shot circuit of the same; FIG.
The figure is a circuit diagram of the clock latch circuit same as above. 1... One-shot circuit, 2-... Clock latch circuit, 3... NOR circuit. Figure 4 - Figure 5

Claims

[Scope of utility model registration request]

a one-shot circuit that outputs an output pulse with a width determined by a CR time constant after a time delay caused by the circuit from the rising edge of an input signal; and a one-shot circuit that inputs the input signal to an input terminal and inputs an inverted signal to a reset terminal; a clock latch circuit that inputs the output of the one-shot circuit to a clock terminal and outputs an output that becomes "L9t" at the rising edge of the output pulse of the one-shot circuit and becomes "H" at the rising edge of the input signal; and a d-two clutch circuit that takes the output pulse of the one-shot circuit. The output of
A time delay circuit consisting of a NOR circuit and a NOR circuit that outputs an output.