JPS60124134U - signal shaping circuit - Google Patents
signal shaping circuitInfo
- Publication number
- JPS60124134U JPS60124134U JP1116884U JP1116884U JPS60124134U JP S60124134 U JPS60124134 U JP S60124134U JP 1116884 U JP1116884 U JP 1116884U JP 1116884 U JP1116884 U JP 1116884U JP S60124134 U JPS60124134 U JP S60124134U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- level
- analog image
- image signal
- shaping circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Facsimile Image Signal Circuits (AREA)
- Manipulation Of Pulses (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の信号整形回路を示す回路図、第２図は第
１図に示した回路の動作を説明するためのタイミングチ
ャート、第３図は本考案の信号整形回路の一実施例を示
す回路図、第４図は第３図に示した回路の動作を説明す
るためのタイミングチャートである。
１・・・入力端子、２・・・色力端子、３・・・ナンド
回路、４・・・フリップフロップ。 ′第２
図。
第４図Fig. 1 is a circuit diagram showing a conventional signal shaping circuit, Fig. 2 is a timing chart for explaining the operation of the circuit shown in Fig. 1, and Fig. 3 is an embodiment of the signal shaping circuit of the present invention. The circuit diagram shown in FIG. 4 is a timing chart for explaining the operation of the circuit shown in FIG. 1... Input terminal, 2... Color power terminal, 3... NAND circuit, 4... Flip-flop. 'Second
figure. Figure 4
Claims (1)
よりも小さい第２のレベルに基づいて２値化して第１お
よび第２の２値化信号を形成し、この第１の２値化信号
の立上りでセットされ、この第２の２値化信号の立下り
でリセットされるフリップフロップの出力と前記アナロ
グ画信号とが加わる差動増幅器の差動出力を第３のレベ
ルに基づいて２値化することにより該アナログ画信号を
信号整形することを特徴とする信号整形回路。The analog image signal is binarized based on a first level and a second level smaller than the first level to form first and second binarized signals, and the first binarized signal is The differential output of the differential amplifier to which the analog image signal is added and the output of the flip-flop, which is set at the rising edge of , and reset at the falling edge of this second binary signal, is converted to a binary value based on the third level. 1. A signal shaping circuit that shapes the analog image signal by converting the analog image signal into a signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116884U JPS60124134U (en) | 1984-01-31 | 1984-01-31 | signal shaping circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116884U JPS60124134U (en) | 1984-01-31 | 1984-01-31 | signal shaping circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60124134U true JPS60124134U (en) | 1985-08-21 |
Family
ID=30493036
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1116884U Pending JPS60124134U (en) | 1984-01-31 | 1984-01-31 | signal shaping circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60124134U (en) |
-
1984
- 1984-01-31 JP JP1116884U patent/JPS60124134U/en active Pending
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