JPS59161732U - latch circuit - Google Patents
latch circuitInfo
- Publication number
- JPS59161732U JPS59161732U JP5403283U JP5403283U JPS59161732U JP S59161732 U JPS59161732 U JP S59161732U JP 5403283 U JP5403283 U JP 5403283U JP 5403283 U JP5403283 U JP 5403283U JP S59161732 U JPS59161732 U JP S59161732U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- comparison
- output
- level
- latch circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Processing Of Color Television Signals (AREA)
- Manipulation Of Pulses (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はラッチ回路によって得べき信号の説明′に供す
る信号波形図、第2図及び第3図は従来のラッチ回路の
問題点の説明に供する信号波形図、第4図は本考案によ
るラッチ回路の一実施例を示す接続図、第5図はその動
作の説明に供する信号波形図である。
1′・・・ラッチ回路、−5・・・比較回路、7・・・
波形整形回路、8・・・079777071回路。Figure 1 is a signal waveform diagram to explain the signals that should be obtained by the latch circuit, Figures 2 and 3 are signal waveform diagrams to explain the problems of the conventional latch circuit, and Figure 4 is the signal waveform diagram of the latch circuit according to the present invention. A connection diagram showing one embodiment of the circuit, and FIG. 5 is a signal waveform diagram for explaining its operation. 1'...Latch circuit, -5...Comparison circuit, 7...
Waveform shaping circuit, 8...079777071 circuit.
Claims (1)
比較回路と、この比較回路の比較出力を受けてサンプル
パルスが到来したとき当該比較出力の論理レベルを読込
んで出力信号をランチ出力として送出する079777
071回路と、上記079777071回路の出力信号
を上記基準入力端に帰還することにより上記基準レベル
を制御するフィードバック回路とを具えることを特徴と
するラッチ回路、bA comparison circuit that compares the level of the input signal with the reference level at the reference input terminal, and a comparison circuit that receives the comparison output of this comparison circuit, reads the logic level of the comparison output when a sample pulse arrives, and sends out the output signal as a launch output. 079777
071 circuit; and a feedback circuit that controls the reference level by feeding back the output signal of the 079777071 circuit to the reference input terminal, b.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5403283U JPS59161732U (en) | 1983-04-13 | 1983-04-13 | latch circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5403283U JPS59161732U (en) | 1983-04-13 | 1983-04-13 | latch circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59161732U true JPS59161732U (en) | 1984-10-30 |
JPH036033Y2 JPH036033Y2 (en) | 1991-02-15 |
Family
ID=30184381
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5403283U Granted JPS59161732U (en) | 1983-04-13 | 1983-04-13 | latch circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59161732U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5748845A (en) * | 1980-09-09 | 1982-03-20 | Nec Corp | Data signal detecting circuit |
-
1983
- 1983-04-13 JP JP5403283U patent/JPS59161732U/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5748845A (en) * | 1980-09-09 | 1982-03-20 | Nec Corp | Data signal detecting circuit |
Also Published As
Publication number | Publication date |
---|---|
JPH036033Y2 (en) | 1991-02-15 |
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