JPS591235U - signal input circuit - Google Patents

signal input circuit

Info

Publication number
JPS591235U
JPS591235U JP9455882U JP9455882U JPS591235U JP S591235 U JPS591235 U JP S591235U JP 9455882 U JP9455882 U JP 9455882U JP 9455882 U JP9455882 U JP 9455882U JP S591235 U JPS591235 U JP S591235U
Authority
JP
Japan
Prior art keywords
comparison level
comparison
signal
signal input
input circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9455882U
Other languages
Japanese (ja)
Inventor
紀之 山下
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP9455882U priority Critical patent/JPS591235U/en
Publication of JPS591235U publication Critical patent/JPS591235U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図は従来の回路の説明のための図、第3図
は本考案の一例の接続図、第4図はその説明のための図
である。 21.22は第1の比較回路を構成するトランジスタ、
23.24は第2の比較回路を構成するトランジスタで
ある。 iI I      −−−一 1゛11盆   −
1 and 2 are diagrams for explaining a conventional circuit, FIG. 3 is a connection diagram of an example of the present invention, and FIG. 4 is a diagram for explaining the same. 21.22 are transistors forming the first comparison circuit;
23 and 24 are transistors forming the second comparison circuit. iI I ---11゛11 Bon-

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 所定の第1の比較レベルを有する第1の比較回路と、上
記第1の比較レベルより高い第2の比較レベルを有する
第2の比較回路とが設けられ、上記第1の比較レベルよ
り低い入力信号及び上記第2の比較レベルより高い入力
信号を検出して2傭の制御信号の一方とし、上記第1の
比較レベルと上記第2の比較レベルの間の入力信号より
アナログ値の制御信号を得るようにした信号入力回路。
A first comparison circuit having a predetermined first comparison level and a second comparison circuit having a second comparison level higher than the first comparison level are provided, and an input lower than the first comparison level is provided. detecting an input signal higher than the signal and the second comparison level and using it as one of the two control signals, and outputting an analog value control signal from the input signal between the first comparison level and the second comparison level. A signal input circuit designed to obtain
JP9455882U 1982-06-24 1982-06-24 signal input circuit Pending JPS591235U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9455882U JPS591235U (en) 1982-06-24 1982-06-24 signal input circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9455882U JPS591235U (en) 1982-06-24 1982-06-24 signal input circuit

Publications (1)

Publication Number Publication Date
JPS591235U true JPS591235U (en) 1984-01-06

Family

ID=30226289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9455882U Pending JPS591235U (en) 1982-06-24 1982-06-24 signal input circuit

Country Status (1)

Country Link
JP (1) JPS591235U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63117269A (en) * 1986-10-30 1988-05-21 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Comparison circuit for plurality of signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63117269A (en) * 1986-10-30 1988-05-21 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション Comparison circuit for plurality of signal

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