JPS5911303U - Analog intermediate value selection circuit - Google Patents

Analog intermediate value selection circuit

Info

Publication number
JPS5911303U
JPS5911303U JP10411982U JP10411982U JPS5911303U JP S5911303 U JPS5911303 U JP S5911303U JP 10411982 U JP10411982 U JP 10411982U JP 10411982 U JP10411982 U JP 10411982U JP S5911303 U JPS5911303 U JP S5911303U
Authority
JP
Japan
Prior art keywords
intermediate value
selection circuit
analog
value selection
analog intermediate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10411982U
Other languages
Japanese (ja)
Inventor
末続 和由
Original Assignee
三菱重工業株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱重工業株式会社 filed Critical 三菱重工業株式会社
Priority to JP10411982U priority Critical patent/JPS5911303U/en
Publication of JPS5911303U publication Critical patent/JPS5911303U/en
Pending legal-status Critical Current

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  • Safety Devices In Control Systems (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案の一実施例の概略構成を示すブロック線図で
ある。 1・・・高信号選択器、2・・・低信号選択器、3・・
・減算器、4・・・H/Lモニタ。
The figure is a block diagram showing a schematic configuration of an embodiment of the present invention. 1...High signal selector, 2...Low signal selector, 3...
- Subtractor, 4...H/L monitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 3つのアナログ信号の中から中間値のアナログ′信号を
選択する回路において、上記3つのアナログ信号がそれ
ぞれ入力される高信号選択器および低信号選択器と、上
記3つのアナログ信号から上記高信号選択器および低信
号選択器の各出力信号を減算し中間値のアナログ信号を
出力する減算器とを具えてなることを特徴とするアナロ
グ中間値撰択回路。
A circuit for selecting an intermediate-value analog signal from among three analog signals includes a high signal selector and a low signal selector to which the three analog signals are respectively input, and a high signal selector for selecting the high signal from among the three analog signals. 1. An analog intermediate value selection circuit comprising: a subtracter that subtracts each output signal of the low signal selector and the low signal selector to output an intermediate value analog signal.
JP10411982U 1982-07-09 1982-07-09 Analog intermediate value selection circuit Pending JPS5911303U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10411982U JPS5911303U (en) 1982-07-09 1982-07-09 Analog intermediate value selection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10411982U JPS5911303U (en) 1982-07-09 1982-07-09 Analog intermediate value selection circuit

Publications (1)

Publication Number Publication Date
JPS5911303U true JPS5911303U (en) 1984-01-24

Family

ID=30244617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10411982U Pending JPS5911303U (en) 1982-07-09 1982-07-09 Analog intermediate value selection circuit

Country Status (1)

Country Link
JP (1) JPS5911303U (en)

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