JPS61206247A - 半導体装置用リ−ドフレ−ム - Google Patents
半導体装置用リ−ドフレ−ムInfo
- Publication number
- JPS61206247A JPS61206247A JP60046668A JP4666885A JPS61206247A JP S61206247 A JPS61206247 A JP S61206247A JP 60046668 A JP60046668 A JP 60046668A JP 4666885 A JP4666885 A JP 4666885A JP S61206247 A JPS61206247 A JP S61206247A
- Authority
- JP
- Japan
- Prior art keywords
- bed
- lead
- chip mounting
- straight line
- external lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 33
- 239000011347 resin Substances 0.000 abstract description 18
- 229920005989 resin Polymers 0.000 abstract description 18
- 238000000465 moulding Methods 0.000 abstract description 12
- 230000015556 catabolic process Effects 0.000 abstract 1
- 230000002950 deficient Effects 0.000 abstract 1
- 238000011835 investigation Methods 0.000 abstract 1
- 238000003754 machining Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 6
- 238000007789 sealing Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 229910000531 Co alloy Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- QXZUUHYBWMWJHK-UHFFFAOYSA-N [Co].[Ni] Chemical compound [Co].[Ni] QXZUUHYBWMWJHK-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60046668A JPS61206247A (ja) | 1985-03-11 | 1985-03-11 | 半導体装置用リ−ドフレ−ム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60046668A JPS61206247A (ja) | 1985-03-11 | 1985-03-11 | 半導体装置用リ−ドフレ−ム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61206247A true JPS61206247A (ja) | 1986-09-12 |
| JPH0527986B2 JPH0527986B2 (enrdf_load_stackoverflow) | 1993-04-22 |
Family
ID=12753732
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60046668A Granted JPS61206247A (ja) | 1985-03-11 | 1985-03-11 | 半導体装置用リ−ドフレ−ム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61206247A (enrdf_load_stackoverflow) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012015202A (ja) * | 2010-06-29 | 2012-01-19 | On Semiconductor Trading Ltd | 半導体装置およびその製造方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS555586A (en) * | 1978-06-29 | 1980-01-16 | Mitsubishi Electric Corp | Demodulation circuit for digital signal |
| JPS5555586A (en) * | 1978-10-19 | 1980-04-23 | Matsushita Electric Ind Co Ltd | Luminous part |
| JPS57155757A (en) * | 1981-03-23 | 1982-09-25 | Hitachi Ltd | Semiconductor device |
| JPS59191360A (ja) * | 1983-04-15 | 1984-10-30 | Internatl Rectifier Corp Japan Ltd | 半導体装置用リードフレーム |
-
1985
- 1985-03-11 JP JP60046668A patent/JPS61206247A/ja active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS555586A (en) * | 1978-06-29 | 1980-01-16 | Mitsubishi Electric Corp | Demodulation circuit for digital signal |
| JPS5555586A (en) * | 1978-10-19 | 1980-04-23 | Matsushita Electric Ind Co Ltd | Luminous part |
| JPS57155757A (en) * | 1981-03-23 | 1982-09-25 | Hitachi Ltd | Semiconductor device |
| JPS59191360A (ja) * | 1983-04-15 | 1984-10-30 | Internatl Rectifier Corp Japan Ltd | 半導体装置用リードフレーム |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012015202A (ja) * | 2010-06-29 | 2012-01-19 | On Semiconductor Trading Ltd | 半導体装置およびその製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0527986B2 (enrdf_load_stackoverflow) | 1993-04-22 |
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