JPS61189652A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS61189652A
JPS61189652A JP60029352A JP2935285A JPS61189652A JP S61189652 A JPS61189652 A JP S61189652A JP 60029352 A JP60029352 A JP 60029352A JP 2935285 A JP2935285 A JP 2935285A JP S61189652 A JPS61189652 A JP S61189652A
Authority
JP
Japan
Prior art keywords
wire
bonding
wedge
semiconductor device
tool
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60029352A
Other languages
English (en)
Inventor
Akira Kuromaru
黒丸　明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60029352A priority Critical patent/JPS61189652A/ja
Publication of JPS61189652A publication Critical patent/JPS61189652A/ja
Pending legal-status Critical Current

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 （発明の技術分野） 本発明は半導体装置、特に半導体ペレットと、リード部
とがワイヤボンディングされた半導体装置に関する。
（発明の技術的背景〕 第４図に従来一般に用いられているワイヤボンディング
部を有する半導体装置の断面図を示す。
半導体ペレット１はフレームベッド２の上にのせられ、
この半導体ペレット１上に設けられたボンディングパッ
ド３とリード部４とは、ボンディングワイヤ５によって
電気的に接続されている。また、これらはモールド樹脂
体６によって一体となって封止されている。
この装置のワイヤボンディング部分の拡大図を第３図に
示す。同図（ａ）は上面図、（ｂ）は側面図であり、各
要素については第４図と同一符号が付されているので説
明を省略づる。ボンディングワイヤ５の一端はボール部
５１を、他端はステッチ部５２を、それぞれ形成してい
る。即ち、ボンディングパッド３へはボールボンディン
グされ、リード部４へはステッチボンディングされてお
り、全体としてボールアンドステッチボンディングが行
われている。
従来一般に行われているボールアンドステッチボンディ
ングの方法を第６図に示す。同図（ａ）に示すようにキ
ャピラリ１１には金線１２が供給されている。この金線
１２とトーチ電極１３との間に電源１４によって高電圧
を印加し、放電を行わせる。この放電により金線１２の
先端に１．１金ボール１５が形成される。続いて同図（
ｂ）に示すように、金ボール１５を半導体ペレット１上
のボンディングパッド３に圧接し、超音波と熱を力Ｘｓ
ｔで電気的に接続する。次に同図（Ｃ）に示すように、
キャピラリ１１を移動しながら金線１２を引出してゆき
、キャピラリ１１が所定位置まで移動したら、キャピラ
リ１１をリード部４へ打降ろし金１１２をリード部４に
圧接するとともに切断する。同図（Ｃ）の二点鎖線はこ
のときの金線１２の動きを示す。こうして同図（ｄ）に
示すようにボンディングワイヤ５が形成される。
（を景技術の問題点） 従来の半導体装置には、ワイヤボンディングにおける接
合部面積が大きくなるという欠点がある。
即ち、第３図（ａ）に示すように、／Ｉ＜ンデイングバ
ッド３への接続はボール部５１によってなされているた
め、ボンディングパッド３Ｉよこのために必要な面積を
有していなければならない。従来の一般的な装置では、
ボンディングパッド３の大きさは０．１×０．１１１１
１１＋程度、ボンディングワイヤ５の間隔は０．２ｍ程
度である。従来の装置で１．１、接合部面積をこれ以上
小さくすることは困難であり、このため例えばＩ　Ｍｂ
ｉｔ　、　４Ｍｂｉｔ等のメモリではチップがかなり大
きくなり、高集積化の点で問題となっていた。
また、従来装置のワイＸ７ホボンデイングエ程では、放
電のスパークによって金ボールを形成しているが、この
放電により金ボール付近のワイヤが損傷を受け、後に切
断するおそれがあるという欠点が生ずる。更に、ボンデ
ィングワイヤの一端はボール部による接続（強度４０〜
１００ｇ″）であり、他端はステッチ部による接続（強
度４〜１０ｇ）であるので、それぞれの接続強度が著し
く異なり、ワイヤボンディング後の接続強度試験を別々
に行わなくてはならない。また、ボンディングワイヤの
形状は自然懸垂にまかせて決定されるため、キャピラリ
の移動制御を適正に保たないと、ボンディングワイヤが
不適当な箇所に接触したりする事故が発生する可能性が
ある。
このように従来装置には、ワイヤボンディングのために
広い占有面積が必要となり、また、接触不良を生ずるお
それがあるという欠点があった。
〔発明の目的〕
そこで本発明はワイヤボンディングのための占有面積が
少なく、しかも接触不良を生ずるＪ３それのない半導体
装置を提供することを目的とする。
〔発明の概要〕
本発明の特徴はモールドＩｌｌ脂封止型の半導体装置に
おいて、半導体ベレットとリード部とを電気的に接続す
る金線のボンディングワイヤを、その両端がウェッジボ
ンディングによってボンディングされるように接続し、
ワイヤボンディングのための占有面積を少なくし、しか
も接触不良を生ずる可能性を低くした点にある。
〔発明の実施例〕
以下本発明を図示する実施例に基づ（Ａで説明する。第
２図に本発明の一実施例に係る半導体装置の断面図を示
す。ここで各構成要素について（ま第４図の従来例と同
一符号を付し説明を省略する。
従来装置との相違点は、ボンディングワイヤ５の両端が
ウェッジボンディングされている点である。
この装置のワイヤボンディング部分の拡大図を第１図に
示す。同図（ａ）は上面図、（ｂ）　４ま倶１面図であ
る。ボンディングワイヤ５の両端はウェッジ部５３およ
び５４を形成し、それぞれボンディングパッド３および
リード部４に接続されＣいる。このようなウェッジボン
ディングは、セラミック等の外囲器を有するいわゆるハ
ーメチックシール型の半導体装置において、アルミニウ
ム線のワイヤボンディングに従来から用いられている。
本発明は、モールド樹脂封止型の半導体装置に４５ける
金線のワイヤボンディングにこのウェッジボンディング
を用いたものである。
第５図に本発明に係る半導体装置のワイヤボンディング
工程を示１０同図（ａ＞に示すようにウェッジツール２
１に【よ金線２２が供給されている。
ウェッジツール２１には金線２２を通すだけの貫通孔が
水平面に対して約３０”程度の傾きで設けられており、
金線２２はこの貫通孔に通され支持される。ウェッジツ
ール２１は金線２２を保持した状態のまま半導体ベレッ
ト１上のボンディングパッド３に打降ろされ、ウェッジ
ツール２１の底面によって金線２２がボンディングパッ
ド３に押圧される。ここで超音波と熱がかけられ、金線
２２とボンディングパッド３とが接続される。続いて同
図（ｂ）に示すようにウェッジツール２１を移動しなが
ら金線２２を引出してゆく。図の二点鎖線【よこのとき
のウェッジツール２１および金線２２の動きを示す。な
お、金線２２は前述のように１通孔によって支持されな
がら引出されるため、従来のキャピラリを用いた方法よ
り自由度は少なくなる。ウェッジツール２１が所定位置
まで移動したら、同図（Ｃ）に示すようにリード部４へ
打降ろし、金線２２をリード部４に圧接するとともに切
断する。こうして同図（ｄ）に示すようにボンディング
ワイヤ５が形成される。
第１図（ａ）に示ずように、本発明に係る装置ては、ボ
ンディングワイヤ５は両端ともウェッジ部５３．５４に
より接続されているため、ボール部によって接続を行な
っていた従来装置に比べ、ワイヤボンディングの占有面
積を小さくすることができる。本実施例では、ボンディ
ングパッド３の大きさはＯ，ＩＸｏ、０８ａｌ＋程度、
ボンディングワイヤ５の間隔は０．１Ｍ１程度となり、
従来装置に比べ集積化が図られている。
また、従来装置のように放電により金ボールを形成する
工程が不要となるため、ワイヤの＠傷がなく、後に切断
するおそれがなくなる。また、ボンディングワイヤ５の
両端ともにウェッジボンディングが行われているため、
両端の接続強度が同程度となり、接続強度試験が容易と
なる。更に、ワイヤの自由度の少ないウェッジツールを
用いたため、ボンディングワイヤ５の形状は、第１図（
１））に示すように屈曲部５５で強制的に曲げられた゛
＜″の字形のものとなるため、ボンディングワイヤが不
適当な箇所に接触したりする事故が少なくなる。
（発明の効果） 以上のとおり本発明によれば、モールド樹脂封止型の半
導体装置において、金線のボンディングワイヤの両端を
ウェッジボンディングするようにしたため、ワイヤボン
ディングのための占有面積が少なくなり、しかも接触不
良の生じる可能性が低減する。
【図面の簡単な説明】 第１図（ａ）は本発明に係る半導体装置のワイヤボンデ
ィング部分の上面図、第１図（ｂ）は同側面図、第２図
は本発明に係る半導体装置の断面図、第３図（ａ）は従
来の半導体装置のワイヤボンディング部分の上面図、第
３図（ｂ）は同側面図、第４図は従来の半導体装置の断
面図、第５図は本発明に係る半導体装置の製造に用いる
ワイヤボンディング工程を示す工程図、第６図は従来の
半導体装置の製造に用いるワイヤボンディング工程を示
す工程図である。 １・・・半導体ペレット、２・・・フレームベッド、３
・・・ボンディングパッド、４・・・リード部、５・・
・ボンディングワイヤ、５１・・・ボール部、５２・・
・ステッチ部、５３．５４・・・ウェッジ部、５５・・
・屈曲部、１１・・・キャピラリ、１２・・・金線、１
３・・・トーチ電極、１４・・・電源、１５・・・金ボ
ール、２１・・・ウェッジツール、２２・・・金線。 出願人代理人　　猪　　股　　　　清 ら　１　図 ５２　図 ６３　図 ら４　図

Claims (1)

  1. 【特許請求の範囲】 １、ボンディングパッドを有する半導体ペレットと、こ
    の半導体ペレットを支持するフレームベッドと、外部と
    の配線に用いるためのリード部と、一端が前記ボンディ
    ングパッドに、他端が前記リード部に、それぞれウェッ
    ジボンディングによってボンディングされた金線のボン
    ディングワイヤと、これらを一体として封止するモール
    ド樹脂体とをそなえることを特徴とする半導体装置。 ２、モールド樹脂体がプラスチックであることを特徴と
    する特許請求の範囲第１項記載の半導体装置。
JP60029352A 1985-02-19 1985-02-19 半導体装置 Pending JPS61189652A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60029352A JPS61189652A (ja) 1985-02-19 1985-02-19 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60029352A JPS61189652A (ja) 1985-02-19 1985-02-19 半導体装置

Publications (1)

Publication Number Publication Date
JPS61189652A true JPS61189652A (ja) 1986-08-23

Family

ID=12273816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60029352A Pending JPS61189652A (ja) 1985-02-19 1985-02-19 半導体装置

Country Status (1)

Country Link
JP (1) JPS61189652A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63165896A (ja) * 1986-12-27 1988-07-09 スタンレー電気株式会社 チツプオングラス実装用基板
EP0378209A2 (en) * 1989-01-11 1990-07-18 Kabushiki Kaisha Toshiba Hybrid resin-sealed semiconductor device
EP0822264A1 (en) * 1996-07-31 1998-02-04 Tanaka Denshi Kogyo Kabushiki Kaisha Gold alloy wire for wedge bonding and use thereof for wedge bonding
JP2006261542A (ja) * 2005-03-18 2006-09-28 Nec Electronics Corp 半導体装置及びその製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63165896A (ja) * 1986-12-27 1988-07-09 スタンレー電気株式会社 チツプオングラス実装用基板
EP0378209A2 (en) * 1989-01-11 1990-07-18 Kabushiki Kaisha Toshiba Hybrid resin-sealed semiconductor device
EP0822264A1 (en) * 1996-07-31 1998-02-04 Tanaka Denshi Kogyo Kabushiki Kaisha Gold alloy wire for wedge bonding and use thereof for wedge bonding
JP2006261542A (ja) * 2005-03-18 2006-09-28 Nec Electronics Corp 半導体装置及びその製造方法
JP4666592B2 (ja) * 2005-03-18 2011-04-06 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

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