JPS62150836A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS62150836A
JPS62150836A JP60290640A JP29064085A JPS62150836A JP S62150836 A JPS62150836 A JP S62150836A JP 60290640 A JP60290640 A JP 60290640A JP 29064085 A JP29064085 A JP 29064085A JP S62150836 A JPS62150836 A JP S62150836A
Authority
JP
Japan
Prior art keywords
wire
pad
semiconductor device
bonding
pellet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60290640A
Other languages
English (en)
Inventor
Isamu Yamazaki
勇 山崎
Shunichi Hino
日野　俊市
Kenji Watanabe
健二 渡辺
Michio Okamoto
道夫 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60290640A priority Critical patent/JPS62150836A/ja
Publication of JPS62150836A publication Critical patent/JPS62150836A/ja
Pending legal-status Critical Current

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    • H01L2924/181—Encapsulation

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 ［技術分野］ 本発明は、半導体装置、特に電気的接続をワイヤボンデ
ィング方式で行う半導体装置に適用して有効な技術に関
する。
［背景技術］ 半導体装置のパッケージ内部の結線法としてワイヤボン
ディング法が知られているが、これはペレットのパッド
とインナーリードあるいは電極層とをループ形状に張設
された導電性のワイヤで接続するものである。
上記技術では、ボンディングツールとしてキャピラリあ
るいはウェッジ等の接合治具を作動制御させてワイヤの
張設を行うことが知られている。
しかし、これらの治具の押圧によりボンディング部位、
特に第一ボンディング部位であるペレットのパッドが損
傷される場合のあることが本発明者によって明らかにさ
れた。
ところで、ワイヤの材質としては金（Ａｕ）に代わるも
のとして、被覆線として酸化被覆の形成が容易で金より
も安価な銅（Ｃｕ）を用いることが考えられるが、銅を
主成分とするワイヤは硬度が比較的高く、ボンディング
の際に上述のパッド等の下地を損傷するおそれが特に高
いことがあわせて本発明者によって明らかにされた。
なお、ワイヤボンディング技術として詳しく述べである
例としては、株式会社工業調査会、１９８０年１月１５
日発行ｒｆｃ化実装技術」　（日本マイクロエレクトロ
ニクスＷ会Ｗ）　、Ｐ　９９〜Ｐ１０３がある。
［発明の目的］ 本発明の目的は、パッド等の下地部材を損傷することな
く接合強度の高いワイヤボンディング技術を提供するこ
とにある。
本発明の他の目的は、電気的信頼性の高い半導体装置を
提供することにある。
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。
［発明の概要］ 本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。
すなわち、少なくともパッケージ本体内部の電気的導通
を達成するワイヤの一端部とペレットのパッドとの接合
部分に金属層を介設することによって、ワイヤボンディ
ングの際のボンディングツールの押圧によるパッド等の
下地の損傷を防止して接合強度の高いワイヤボンディン
グを達成することができる。
また、上記により電気的信頼性の高い半導体装置を提供
することができる。
［実施例１］ 第１図は本発明の一実施例である半導体装置のワイヤ接
合部近傍を示す拡大部分断面図、第２図は半導体装置全
体を示す断面図である。
本実施例１の半導体装置ｌは、エポキシ樹脂等の合成樹
脂よりなるパッケージ本体２内にペレット３が封止され
てなる、いわゆる樹脂封止型の半導体装置であり、その
外観は２方向に外部電極としてのリード４を有するデュ
アルインライン（ＤＩＬ）型のパフケージ形状を有して
いる。
前記パッケージ本体２のエポキシ樹脂で封止されている
リード４の中央部にはタブ５が形成されており、該タブ
５の上にはシリコン（Ｓｔ）からなるペレット３が銀（
Ａｇ）等のペースト６によって取付けられており、いわ
ゆるアイランド部を形成している。また、前記タブ５の
周囲部分でパッケージ本体２に埋設される部分はインナ
ーリード４ａとして形成されている。このインナーリー
ド４ａの表面にはワイヤ７の接合を良好に行うために金
（Ａｕ）等のめっきを施してもよい。
前記ペレット３の表面にはアルミニウムからなるパッド
８が形成されており、さらにこのパッド８の最上層には
金バンプ９が形成されている。この金バンプ９の形成は
例えば電解めっきあるいは薄着等の手段により行うこと
ができ、この形成はペレット３に分割する前のウェハ状
態で行ってもよいし、また分割後のベレット状態あるい
はマウントした状態で行ってもよい。
上記バッド８上の金バンプ９とインナーリード４ａとは
銅（Ｃｕ）からなるワイヤｌＯで電気的に接続されてい
る。このワイヤ１０は例えば第１図に示すようにワイヤ
ｌＯの周面に酸化膜１０ａが形成されている、いわゆる
被覆線である。このような酸化膜１０ａの形成は、たと
えば銅ワイヤ１０に黒化処理を施すことによって容易に
形成することができるものである。
上記ワイヤ１０による接続は、たとえば以下のようにし
て行われるものである。
まず、ボンディングツールとしてのキャピラリ（図示せ
ず）の先端から突出された状態のワイヤ１０の端部を加
熱して溶融ボールを形成して、該ボール部分ｌＯｂをパ
ッド８上の金バンプ９上に押圧する。このとき、本実施
例１によれば溶融ボールの押圧はパッド８に対して直接
行われずに前記金バンプ９を介しておこなわれるため、
前記金バンプ９がクッションとなり、前記押圧力が吸収
されるため、パッド８の損傷を防止できる。
このようにして第一ボンディングを完了した後に、前記
ワイヤ１０はループを描くように十分な長さを確保され
て、その他端部分に超音波振動が印加されてインナーリ
ード４ａの所定部位にワイヤ１０が接合される。さらに
、前記ワイヤｌＯの余線部分が切断されてボンディング
が完了する。
上記工程が所定回数繰り返されて結線が全て完了すると
、樹脂モールド工程が行われる。この工程では、金型（
図示せず）を用いて樹脂を高圧で注入する作業が行われ
るが、樹脂の注入圧によりワイヤ流れを生じるおそれが
ある。しかし、本実施例１によればワイヤ１０の周面が
電気的絶縁体である酸化膜１０ａにより被覆されている
ため、前記樹脂の注入圧によりワイヤＩＯ同士あるいは
ワイヤｌＯとベレット３の端部が接触状態となっても電
気的短絡を防止できる。
［効果〕 （１）、少なくともパッケージ本体内部の電気的導通を
達成するワイヤの一端部とベレットのパッドとの接合部
分に導電性を有する金属層を介設することによって、ワ
イヤボンディングの際のボンディングツールの押圧によ
るパッド等の下地の損傷を防止して接合強度の高いワイ
ヤボンディングを達成することができる。
（２）、前記＋１１により電気的信頼性の高い半導体装
置を提供することができる。
（３）、前記＋１１により、硬度の高い銅やパラジウム
からなるワイヤを用いた場合にもパッドを損傷すること
なくワイヤボンディングが可能となるために、ワイヤの
低コスト化を図ることができる。
（４）、前記＋１１により、酸化被覆が容易な銅やパラ
ジウムワイヤによるワイヤボンディングが可能となるた
めに、ワイヤ同士あるいはワイヤとベレットとの短絡を
防止して電気的信頼性の高い半導体装置を提供すること
ができる。
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。
たとえば、ワイヤ材質は銅、パラジウムに限らない。
さらに、実施例１ではワイヤとして被覆線を用いた場合
について説明したが、被覆のないワイヤであってもよい
、また被覆を行う場合についても酸化膜に限らず、樹脂
等による被覆であってもよい。
また、金属層についても金バンプに限らず、使用される
ワイヤ材料より硬度が低く、ワイヤ材料との接合性に冨
み、ボンディング時の押圧力を吸収できるものであれば
如何なるものであってもよい。
［利用分野］ 以上の説明では主として本発明者によってなされた発明
をその利用分野である、デュアルインラインパッケージ
形状の樹脂封止型半導体装置に適用した場合について説
明したが、これに限定されるものではなく、たとえばフ
ラットパ１．ケージ形状等他のパッケージ形状のものお
よび他の封止法による半導体装置に適用しても有効な技
術である。
図面の簡ｉｔ’ｃな説明 第１図は本発明の実施例１である半導体装置のワイヤ接
合部近傍を示す拡大部分断面図、第２図は実施例１の半
導体装置全体を示す断面図である。
１・・・半導体装置、２・・・パッケージ本体、３・　
・　・ペレット、４・　・　・リード、４ａ・　・　・
インナーリード、５・・・タブ、６・・・ペースト、７
・・・ワイヤ、８・・・パッド、９・・・金バンプ（金
属層）、１０・・・ワイヤ、１０ａ・・・酸化膜、１０
ｂ・・・ボール部分、２１・・・半導体装置。
、″、

Claims (1)

  1. 【特許請求の範囲】 １、パッケージ本体内部の電気的導通がワイヤの張設に
    よって達成されてなる半導体装置であって、少なくとも
    ワイヤによる一方の接合部であるペレットのパッドとワ
    イヤの一端部との接合部分に金属層が介設されているこ
    とを特徴とする半導体装置。 ２、前記金属層がパッド上に形成された金バンプである
    ことを特徴とする特許請求の範囲第１項記載の半導体装
    置。 ３、ワイヤが銅からなることを特徴とする特許請求の範
    囲第１項又は第２項記載の半導体装置。 ４、ワイヤがパラジウムからなることを特徴とする特許
    請求の範囲第１項または第２項記載の半導体装置。 ５、ワイヤが酸化膜により被覆された被覆線であること
    を特徴とする特許請求の範囲第３項記載の半導体装置。
JP60290640A 1985-12-25 1985-12-25 半導体装置 Pending JPS62150836A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60290640A JPS62150836A (ja) 1985-12-25 1985-12-25 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60290640A JPS62150836A (ja) 1985-12-25 1985-12-25 半導体装置

Publications (1)

Publication Number Publication Date
JPS62150836A true JPS62150836A (ja) 1987-07-04

Family

ID=17758580

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60290640A Pending JPS62150836A (ja) 1985-12-25 1985-12-25 半導体装置

Country Status (1)

Country Link
JP (1) JPS62150836A (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007088453A (ja) * 2005-09-23 2007-04-05 Freescale Semiconductor Inc スタックダイパッケージを製造する方法
WO2007055263A1 (ja) * 2005-11-10 2007-05-18 Tatsuta Electric Wire & Cable Co., Ltd. 半導体装置
EP2133915A1 (de) * 2008-06-09 2009-12-16 Micronas GmbH Halbleiteranordnung mit besonders gestalteten Bondleitungen und Verfahren zum Herstellen einer solchen Anordnung
FR2948493A1 (fr) * 2009-07-27 2011-01-28 St Microelectronics Grenoble 2 Procede de connexion electrique d'un fil a un plot d'une puce de circuits integres et dispositif electronique
WO2013129253A1 (ja) * 2012-02-27 2013-09-06 日鉄住金マイクロメタル株式会社 パワー半導体装置及びその製造方法並びにボンディングワイヤ

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007088453A (ja) * 2005-09-23 2007-04-05 Freescale Semiconductor Inc スタックダイパッケージを製造する方法
WO2007055263A1 (ja) * 2005-11-10 2007-05-18 Tatsuta Electric Wire & Cable Co., Ltd. 半導体装置
EP2133915A1 (de) * 2008-06-09 2009-12-16 Micronas GmbH Halbleiteranordnung mit besonders gestalteten Bondleitungen und Verfahren zum Herstellen einer solchen Anordnung
FR2948493A1 (fr) * 2009-07-27 2011-01-28 St Microelectronics Grenoble 2 Procede de connexion electrique d'un fil a un plot d'une puce de circuits integres et dispositif electronique
EP2282329A1 (fr) * 2009-07-27 2011-02-09 STMicroelectronics (Grenoble 2) SAS Procédé de connexion électrique d'un fil de connexion à un plot de contact d'une puce de circuits intégrés et dispositif électronique correspondant.
WO2013129253A1 (ja) * 2012-02-27 2013-09-06 日鉄住金マイクロメタル株式会社 パワー半導体装置及びその製造方法並びにボンディングワイヤ
JP5728126B2 (ja) * 2012-02-27 2015-06-03 日鉄住金マイクロメタル株式会社 パワー半導体装置及びその製造方法並びにボンディングワイヤ
US9059003B2 (en) 2012-02-27 2015-06-16 Nippon Micrometal Corporation Power semiconductor device, method of manufacturing the device and bonding wire

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