JPS6117070B2 - - Google Patents

Info

Publication number
JPS6117070B2
JPS6117070B2 JP6116381A JP6116381A JPS6117070B2 JP S6117070 B2 JPS6117070 B2 JP S6117070B2 JP 6116381 A JP6116381 A JP 6116381A JP 6116381 A JP6116381 A JP 6116381A JP S6117070 B2 JPS6117070 B2 JP S6117070B2
Authority
JP
Japan
Prior art keywords
power supply
circuit
magnetic bubble
bubble memory
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6116381A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57176589A (en
Inventor
Kazuhiro Ishida
Ryuji Yano
Tadaaki Eto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6116381A priority Critical patent/JPS57176589A/ja
Publication of JPS57176589A publication Critical patent/JPS57176589A/ja
Publication of JPS6117070B2 publication Critical patent/JPS6117070B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
JP6116381A 1981-04-24 1981-04-24 Magnetic bubble memory device Granted JPS57176589A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6116381A JPS57176589A (en) 1981-04-24 1981-04-24 Magnetic bubble memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6116381A JPS57176589A (en) 1981-04-24 1981-04-24 Magnetic bubble memory device

Publications (2)

Publication Number Publication Date
JPS57176589A JPS57176589A (en) 1982-10-29
JPS6117070B2 true JPS6117070B2 (en:Method) 1986-05-06

Family

ID=13163193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6116381A Granted JPS57176589A (en) 1981-04-24 1981-04-24 Magnetic bubble memory device

Country Status (1)

Country Link
JP (1) JPS57176589A (en:Method)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153292A (ja) * 1982-03-08 1983-09-12 Fujitsu Ltd 磁気バブルメモリ制御方式

Also Published As

Publication number Publication date
JPS57176589A (en) 1982-10-29

Similar Documents

Publication Publication Date Title
KR940010419B1 (ko) 반도체집적회로
JPH07261883A (ja) 電源制御用半導体集積回路装置
US4352995A (en) Pulse generating circuit with clock pulse ceasing feature
JPS6117070B2 (en:Method)
JPS6120077B2 (en:Method)
JPH04345995A (ja) 半導体記憶装置
JPH10242810A (ja) ラッチ回路
JP3224177B2 (ja) 電源オンオフ制御回路
JP2608368B2 (ja) 電子装置
JP2695696B2 (ja) リセット信号発生回路
KR890001224B1 (ko) 마이크로프로세서를 이용한 시스템에 있어서 리세트 및 데이타 보호회로
JPH0430720Y2 (en:Method)
RU2180985C2 (ru) Триггерное устройство
JP3022567B2 (ja) 半導体記憶装置
JPS633039Y2 (en:Method)
JP2530742B2 (ja) メモリカ―ド
KR920002393Y1 (ko) 전압감지에 의한 메모리 백업회로
JPS5864700A (ja) 記憶保護回路
JP2836235B2 (ja) クロック発生制御回路
JP3080719B2 (ja) 読み出し専用メモリ装置
JPH10340576A (ja) 電子機器
JPH0313784Y2 (en:Method)
RU2250555C1 (ru) Триггерное устройство
JPS6231372B2 (en:Method)
KR0122339B1 (ko) 칩마운트 시스템의 메모리 기억장치