JPS61164037U - - Google Patents
Info
- Publication number
- JPS61164037U JPS61164037U JP1985033518U JP3351885U JPS61164037U JP S61164037 U JPS61164037 U JP S61164037U JP 1985033518 U JP1985033518 U JP 1985033518U JP 3351885 U JP3351885 U JP 3351885U JP S61164037 U JPS61164037 U JP S61164037U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chips
- tape
- chips
- unit
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 4
- 239000000523 sample Substances 0.000 description 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Wire Bonding (AREA)
Description
第1図は本考案による一実施例を示す平面図、
第2図は同実施例に使用するプローブカードの斜
視図、第3図は従来のテープキヤリア半導体装置
の平面図、第4図は従来の半導体装置に用いられ
るプローブカードの斜視図である。
1:テープ、3:半導体チツプ、9,9a,9
b,11:リード導体、5:テストパターン、1
0,10a:テストパターン。
FIG. 1 is a plan view showing an embodiment of the present invention;
FIG. 2 is a perspective view of a probe card used in the same embodiment, FIG. 3 is a plan view of a conventional tape carrier semiconductor device, and FIG. 4 is a perspective view of a probe card used in a conventional semiconductor device. 1: Tape, 3: Semiconductor chip, 9, 9a, 9
b, 11: Lead conductor, 5: Test pattern, 1
0, 10a: Test pattern.
Claims (1)
ード導体に半導体チツプをボンデイングしてなる
半導体装置において、 複数個の半導体チツプを単位とし、該単位内で
少なく共隣接する半導体チツプの間に引き出され
たリード導体の先端を延在させ、テープの長手方
向に配置されたリード導体に並べて位置させてな
ることを特徴とするテープキヤリア半導体装置。[Claims for Utility Model Registration] In a semiconductor device formed by bonding semiconductor chips to a lead conductor formed in a repeated pattern on a long tape surface, a plurality of semiconductor chips are considered as a unit, and within the unit there are few co-adjacent chips. A tape carrier semiconductor device characterized in that the tips of lead conductors drawn out between semiconductor chips are extended and positioned side by side with lead conductors arranged in the longitudinal direction of the tape.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985033518U JPS61164037U (en) | 1985-03-08 | 1985-03-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985033518U JPS61164037U (en) | 1985-03-08 | 1985-03-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61164037U true JPS61164037U (en) | 1986-10-11 |
Family
ID=30536045
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985033518U Pending JPS61164037U (en) | 1985-03-08 | 1985-03-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61164037U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51127678A (en) * | 1975-04-30 | 1976-11-06 | Hitachi Ltd | Semiconductor device and its manufacturing method |
-
1985
- 1985-03-08 JP JP1985033518U patent/JPS61164037U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51127678A (en) * | 1975-04-30 | 1976-11-06 | Hitachi Ltd | Semiconductor device and its manufacturing method |
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