JPS61148850A - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS61148850A JPS61148850A JP59270805A JP27080584A JPS61148850A JP S61148850 A JPS61148850 A JP S61148850A JP 59270805 A JP59270805 A JP 59270805A JP 27080584 A JP27080584 A JP 27080584A JP S61148850 A JPS61148850 A JP S61148850A
- Authority
- JP
- Japan
- Prior art keywords
- package
- leads
- inspection
- lead
- tab
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59270805A JPS61148850A (ja) | 1984-12-24 | 1984-12-24 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59270805A JPS61148850A (ja) | 1984-12-24 | 1984-12-24 | 半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61148850A true JPS61148850A (ja) | 1986-07-07 |
| JPH0586861B2 JPH0586861B2 (enExample) | 1993-12-14 |
Family
ID=17491261
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59270805A Granted JPS61148850A (ja) | 1984-12-24 | 1984-12-24 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61148850A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5521427A (en) * | 1992-12-18 | 1996-05-28 | Lsi Logic Corporation | Printed wiring board mounted semiconductor device having leadframe with alignment feature |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5516476A (en) * | 1978-07-21 | 1980-02-05 | Fujitsu Ltd | Method of mounting semiconductor device |
-
1984
- 1984-12-24 JP JP59270805A patent/JPS61148850A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5516476A (en) * | 1978-07-21 | 1980-02-05 | Fujitsu Ltd | Method of mounting semiconductor device |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5521427A (en) * | 1992-12-18 | 1996-05-28 | Lsi Logic Corporation | Printed wiring board mounted semiconductor device having leadframe with alignment feature |
| US5643835A (en) * | 1992-12-18 | 1997-07-01 | Lsi Logic Corporation | Process for manufacturing and mounting a semiconductor device leadframe having alignment tabs |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0586861B2 (enExample) | 1993-12-14 |
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