JPS61142814A - デイジタル遅延装置 - Google Patents

デイジタル遅延装置

Info

Publication number
JPS61142814A
JPS61142814A JP59264738A JP26473884A JPS61142814A JP S61142814 A JPS61142814 A JP S61142814A JP 59264738 A JP59264738 A JP 59264738A JP 26473884 A JP26473884 A JP 26473884A JP S61142814 A JPS61142814 A JP S61142814A
Authority
JP
Japan
Prior art keywords
memory cell
data
signal
address
cell array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59264738A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0159766B2 (enExample
Inventor
Masahiko Yoshimoto
雅彦 吉本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59264738A priority Critical patent/JPS61142814A/ja
Priority to DE19853543911 priority patent/DE3543911A1/de
Priority to NL8503451A priority patent/NL8503451A/nl
Publication of JPS61142814A publication Critical patent/JPS61142814A/ja
Priority to US07/169,066 priority patent/US4849937A/en
Publication of JPH0159766B2 publication Critical patent/JPH0159766B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Networks Using Active Elements (AREA)
JP59264738A 1984-12-14 1984-12-14 デイジタル遅延装置 Granted JPS61142814A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP59264738A JPS61142814A (ja) 1984-12-14 1984-12-14 デイジタル遅延装置
DE19853543911 DE3543911A1 (de) 1984-12-14 1985-12-12 Digitale verzoegerungseinheit
NL8503451A NL8503451A (nl) 1984-12-14 1985-12-16 Digitale vertragingseenheid.
US07/169,066 US4849937A (en) 1984-12-14 1988-03-17 Digital delay unit with interleaved memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59264738A JPS61142814A (ja) 1984-12-14 1984-12-14 デイジタル遅延装置

Publications (2)

Publication Number Publication Date
JPS61142814A true JPS61142814A (ja) 1986-06-30
JPH0159766B2 JPH0159766B2 (enExample) 1989-12-19

Family

ID=17407483

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59264738A Granted JPS61142814A (ja) 1984-12-14 1984-12-14 デイジタル遅延装置

Country Status (1)

Country Link
JP (1) JPS61142814A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01204290A (ja) * 1988-02-09 1989-08-16 Nec Ic Microcomput Syst Ltd 制御信号発生回路

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02141560U (enExample) * 1989-04-25 1990-11-28
JPH0394361U (enExample) * 1990-01-16 1991-09-26

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56163594A (en) * 1980-05-15 1981-12-16 Canon Inc Memory control device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56163594A (en) * 1980-05-15 1981-12-16 Canon Inc Memory control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01204290A (ja) * 1988-02-09 1989-08-16 Nec Ic Microcomput Syst Ltd 制御信号発生回路

Also Published As

Publication number Publication date
JPH0159766B2 (enExample) 1989-12-19

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