JPS6113627B2 - - Google Patents

Info

Publication number
JPS6113627B2
JPS6113627B2 JP55028513A JP2851380A JPS6113627B2 JP S6113627 B2 JPS6113627 B2 JP S6113627B2 JP 55028513 A JP55028513 A JP 55028513A JP 2851380 A JP2851380 A JP 2851380A JP S6113627 B2 JPS6113627 B2 JP S6113627B2
Authority
JP
Japan
Prior art keywords
processor
common bus
control
processors
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55028513A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56124962A (en
Inventor
Naohisa Oguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP2851380A priority Critical patent/JPS56124962A/ja
Publication of JPS56124962A publication Critical patent/JPS56124962A/ja
Publication of JPS6113627B2 publication Critical patent/JPS6113627B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
JP2851380A 1980-03-06 1980-03-06 Multiprocessor system Granted JPS56124962A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2851380A JPS56124962A (en) 1980-03-06 1980-03-06 Multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2851380A JPS56124962A (en) 1980-03-06 1980-03-06 Multiprocessor system

Publications (2)

Publication Number Publication Date
JPS56124962A JPS56124962A (en) 1981-09-30
JPS6113627B2 true JPS6113627B2 (cs) 1986-04-14

Family

ID=12250758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2851380A Granted JPS56124962A (en) 1980-03-06 1980-03-06 Multiprocessor system

Country Status (1)

Country Link
JP (1) JPS56124962A (cs)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0317011U (cs) * 1989-06-30 1991-02-20

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858629A (ja) * 1981-10-05 1983-04-07 Nec Corp バス切替方式
JP2768449B2 (ja) * 1990-03-01 1998-06-25 富士通株式会社 光パラレルデータ転送方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0317011U (cs) * 1989-06-30 1991-02-20

Also Published As

Publication number Publication date
JPS56124962A (en) 1981-09-30

Similar Documents

Publication Publication Date Title
JP2552651B2 (ja) 再構成可能なデュアル・プロセッサ・システム
JPH0651802A (ja) バックアップ機能を有するプログラマブル・コントローラ
JPS59106056A (ja) フエイルセイフ式デ−タ処理システム
JPS6113627B2 (cs)
JPS60100231A (ja) 情報処理装置におけるシステム構成制御方式
JPS62271150A (ja) 共通バス構造におけるエラ−処理方式
JPH07114521A (ja) マルチマイクロコンピュータシステム
JPH0220029B2 (cs)
JPS59146362A (ja) インタフエ−ス切換え制御方式
JPH047645A (ja) フォールト・トレラント・コンピュータ
JPS6213700B2 (cs)
JPS58203561A (ja) 外部記憶制御装置
JP2815730B2 (ja) アダプタ及びコンピュータシステム
JPS62296264A (ja) デ−タ処理システムの構成制御方式
JPH10187473A (ja) 2重化情報処理装置
JPH09146853A (ja) 二重化計算機及びその障害系復旧方法
JP2630100B2 (ja) プロセッサ間通信用バスの障害処理方式
JP3055906B2 (ja) 緊急動作方式
JPH05233576A (ja) 二重システム
JPS5816497B2 (ja) システム共通部をそなえたデ−タ処理システム
JPS62160540A (ja) 二重化情報処理装置
JPS5850372B2 (ja) デ−タ集配信処理システム
JPS60251443A (ja) プログラマブルコントロ−ラのバツクアツプ装置
JPH03266132A (ja) 情報処理装置
JPS63174149A (ja) 情報処理システム