JPS6113267B2 - - Google Patents

Info

Publication number
JPS6113267B2
JPS6113267B2 JP2883182A JP2883182A JPS6113267B2 JP S6113267 B2 JPS6113267 B2 JP S6113267B2 JP 2883182 A JP2883182 A JP 2883182A JP 2883182 A JP2883182 A JP 2883182A JP S6113267 B2 JPS6113267 B2 JP S6113267B2
Authority
JP
Japan
Prior art keywords
address
data
output
input
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2883182A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58146921A (ja
Inventor
Tadashi Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2883182A priority Critical patent/JPS58146921A/ja
Publication of JPS58146921A publication Critical patent/JPS58146921A/ja
Publication of JPS6113267B2 publication Critical patent/JPS6113267B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP2883182A 1982-02-26 1982-02-26 バス結合システムの高速デ−タ転送装置 Granted JPS58146921A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2883182A JPS58146921A (ja) 1982-02-26 1982-02-26 バス結合システムの高速デ−タ転送装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2883182A JPS58146921A (ja) 1982-02-26 1982-02-26 バス結合システムの高速デ−タ転送装置

Publications (2)

Publication Number Publication Date
JPS58146921A JPS58146921A (ja) 1983-09-01
JPS6113267B2 true JPS6113267B2 (enrdf_load_stackoverflow) 1986-04-12

Family

ID=12259327

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2883182A Granted JPS58146921A (ja) 1982-02-26 1982-02-26 バス結合システムの高速デ−タ転送装置

Country Status (1)

Country Link
JP (1) JPS58146921A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10255071B4 (de) * 2002-11-25 2007-04-12 Polymer-Synthese-Werk Gmbh Transportbehälter

Also Published As

Publication number Publication date
JPS58146921A (ja) 1983-09-01

Similar Documents

Publication Publication Date Title
US4149242A (en) Data interface apparatus for multiple sequential processors
JP2571067B2 (ja) バスマスタ
JPS6113267B2 (enrdf_load_stackoverflow)
JPS58201166A (ja) マルチプロセツサ方式
JPS61165170A (ja) バス制御方式
US5590302A (en) Device for generating structured addresses
JPS5858752B2 (ja) アドレス変換装置
JP2552287B2 (ja) システムバス方式
JPS63129438A (ja) メモリ制御装置
JPS62168257A (ja) メモリを共用するマルチプロセツサシステム
JPS63186363A (ja) マルチｃｐｕシステムのメモリ領域設定回路
JPS6014435B2 (ja) 記憶装置
JPS60247767A (ja) 共有メモリの読出し書き込み動作の同時入出力方式
JPH01209556A (ja) データ処理システム
JPS5999522A (ja) 入出力制御方式
JPS59114657A (ja) マイクロコンピユ−タのメモリ用インタ−フエイス回路
JPS6379161A (ja) 半導体記憶装置
JPS61153770A (ja) 画像処理装置
JPS6367658A (ja) オンチツプメモリの並列アクセス機構
JPS62224855A (ja) デ−タ処理装置
JPS6075947A (ja) メモリ制御方式
JPS54157444A (en) Memory control system
JPS59208662A (ja) リ−ドオンリ−メモリのアドレス数を拡張する回路
JPS62274346A (ja) メモリアクセス回路
JPH0139137B2 (enrdf_load_stackoverflow)