JPS61125057U - - Google Patents
Info
- Publication number
- JPS61125057U JPS61125057U JP1985008130U JP813085U JPS61125057U JP S61125057 U JPS61125057 U JP S61125057U JP 1985008130 U JP1985008130 U JP 1985008130U JP 813085 U JP813085 U JP 813085U JP S61125057 U JPS61125057 U JP S61125057U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- firmly mounted
- hybrid
- semiconductor pellets
- electronic components
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000008188 pellet Substances 0.000 claims description 5
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第1図乃至第6図は本考案に係るハイブリツド
ICの各実施例を説明するためのもので、第1図
は本考案の第1の実施例を示す要部分解斜視図、
第2図はその断面図、第3図はワイヤボンデイン
グを完了した状態を示す断面図、第4図は第2の
実施例を示す要部分解斜視図、第5図はその断面
図、第6図は第3の実施例を示す要部分解斜視図
である。第7図は従来のハイブリツドICを示す
要部分解斜視図、第8図はそのハイブリツドIC
のワイヤボンデイングを完了した状態を示す平面
図、第9図は第8図におけるA―A線に沿う断面
図である。
1…リードフレーム、2,2′,2″,2…
ランド部、4…リード、6,6′…基板、6a,
6a′…表面、6b,6b′…裏面、7…導電パ
ターン、8a,8b…半導体ペレツト群、9a,
9b…半導体ペレツト群以外の電子部品(チツプ
部品)。
1 to 6 are for explaining each embodiment of the hybrid IC according to the present invention, and FIG. 1 is an exploded perspective view of essential parts showing the first embodiment of the present invention;
FIG. 2 is a sectional view thereof, FIG. 3 is a sectional view showing a state in which wire bonding is completed, FIG. 4 is an exploded perspective view of main parts showing the second embodiment, FIG. 5 is a sectional view thereof, and FIG. The figure is an exploded perspective view of essential parts showing a third embodiment. Fig. 7 is an exploded perspective view of the main parts of a conventional hybrid IC, and Fig. 8 shows the hybrid IC.
FIG. 9 is a sectional view taken along line AA in FIG. 8. 1... Lead frame, 2, 2', 2'', 2...
Land portion, 4...Lead, 6, 6'...Substrate, 6a,
6a'...Front surface, 6b, 6b'...Back surface, 7...Conductive pattern, 8a, 8b...Semiconductor pellet group, 9a,
9b...Electronic components (chip components) other than the semiconductor pellet group.
Claims (1)
を固着し、該基板の上に複数種の半導体ペレツト
群を含む電子部品を固着マウントしてなるハイブ
リツドICにおいて、上記リードフレームのラン
ド部を中抜き加工して枠状に成形し、基板の一方
の面に半導体ペレツト群を固着マウントし、且つ
、基板の他方の面に上記半導体ペレツト群以外の
電子部品を固着マウントしたことを特徴とするハ
イブリツドIC。 In a hybrid IC in which a substrate is fixed onto the land portion of a metal lead frame, and electronic components containing a plurality of types of semiconductor pellets are firmly mounted on the substrate, the land portion of the lead frame is hollowed out. A hybrid IC characterized in that it is processed and formed into a frame shape, a group of semiconductor pellets is firmly mounted on one surface of the substrate, and electronic components other than the group of semiconductor pellets are firmly mounted on the other surface of the substrate. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985008130U JPS61125057U (en) | 1985-01-24 | 1985-01-24 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985008130U JPS61125057U (en) | 1985-01-24 | 1985-01-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61125057U true JPS61125057U (en) | 1986-08-06 |
Family
ID=30487131
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985008130U Pending JPS61125057U (en) | 1985-01-24 | 1985-01-24 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61125057U (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009283563A (en) * | 2008-05-20 | 2009-12-03 | Asmo Co Ltd | Resin sealed semiconductor apparatus and its manufacturing method |
JP2010096191A (en) * | 2008-10-14 | 2010-04-30 | Hitachi Automotive Systems Ltd | Speed-change controller and electronic circuit sealing device |
JP2010114346A (en) * | 2008-11-10 | 2010-05-20 | Asmo Co Ltd | Resin sealed semiconductor device and method of producing resin sealed semiconductor device |
-
1985
- 1985-01-24 JP JP1985008130U patent/JPS61125057U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009283563A (en) * | 2008-05-20 | 2009-12-03 | Asmo Co Ltd | Resin sealed semiconductor apparatus and its manufacturing method |
JP2010096191A (en) * | 2008-10-14 | 2010-04-30 | Hitachi Automotive Systems Ltd | Speed-change controller and electronic circuit sealing device |
JP2010114346A (en) * | 2008-11-10 | 2010-05-20 | Asmo Co Ltd | Resin sealed semiconductor device and method of producing resin sealed semiconductor device |