JPH03116052U - - Google Patents
Info
- Publication number
- JPH03116052U JPH03116052U JP2522290U JP2522290U JPH03116052U JP H03116052 U JPH03116052 U JP H03116052U JP 2522290 U JP2522290 U JP 2522290U JP 2522290 U JP2522290 U JP 2522290U JP H03116052 U JPH03116052 U JP H03116052U
- Authority
- JP
- Japan
- Prior art keywords
- chip
- back metal
- integrated circuit
- metal
- circuit body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 2
Landscapes
- Semiconductor Integrated Circuits (AREA)
Description
第１図は半導体から成るチツプ上に複数の回路
ブロツクが搭載されている様子を示す平面図、第
２図は第１図のチツプの裏面における本考案の一
実施例を示す平面図である。
１……半導体基盤、２……回路ブロツクａ、３
……回路ブロツクｂ、４……回路ブロツクｃ、５
……メタル面ａ、６……メタル面ｂ、７……メタ
ル面ｃ、８……リードａ、９……リードｂ、１０
……リードｃ。
FIG. 1 is a plan view showing a plurality of circuit blocks mounted on a semiconductor chip, and FIG. 2 is a plan view showing an embodiment of the present invention on the back side of the chip shown in FIG. 1...Semiconductor substrate, 2...Circuit block a, 3
...Circuit block b, 4...Circuit block c, 5
...Metal surface a, 6...Metal surface b, 7...Metal surface c, 8...Lead a, 9...Lead b, 10
...Lead c.
Claims (1)
に装着されるバツクメタルにおいて、該バツクメ
タルが複数に分割され且つそれぞれの該バツクメ
タルの平面的形状及び位置が前記集積回路本体（
チツプ）上に搭載されている各回路ブロツク毎の
形状及び位置にそれぞれ対応し且つそれぞれ固有
の独立したメタル面の集合から成つていることを
特徴とする集積回路装置基盤電位印加用バツクメ
タル。 In a back metal attached to the back surface of an integrated circuit body (chip) made of a semiconductor, the back metal is divided into a plurality of parts, and the planar shape and position of each back metal are the same as the integrated circuit body (chip).
A back metal for applying a substrate potential to an integrated circuit device, characterized in that it is made up of a set of independent metal surfaces each corresponding to the shape and position of each circuit block mounted on the chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2522290U JPH03116052U (en) | 1990-03-12 | 1990-03-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2522290U JPH03116052U (en) | 1990-03-12 | 1990-03-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03116052U true JPH03116052U (en) | 1991-12-02 |
Family
ID=31528164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2522290U Pending JPH03116052U (en) | 1990-03-12 | 1990-03-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03116052U (en) |
-
1990
- 1990-03-12 JP JP2522290U patent/JPH03116052U/ja active Pending