JPH036841U - - Google Patents
Info
- Publication number
- JPH036841U JPH036841U JP6694389U JP6694389U JPH036841U JP H036841 U JPH036841 U JP H036841U JP 6694389 U JP6694389 U JP 6694389U JP 6694389 U JP6694389 U JP 6694389U JP H036841 U JPH036841 U JP H036841U
- Authority
- JP
- Japan
- Prior art keywords
- lead portion
- die pad
- outer lead
- insulating film
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Description
第１図は本考案にかかるリードフレームの一実
施例を示し、Ａはその平面図、Ｂ，Ｃはそれぞれ
ＡにおけるＢ−Ｂ線、Ｃ−Ｃ線に沿う断
面図、第２図および第３図は従来の半導体素子用
リードフレームを示す図、第４図従来の半導体素
子用リードフレームにおける各部材間の電気的接
続を説明する図、第５図はダイパツド部に絶縁基
板または絶縁性フイルムを貼り付ける場合の説明
図、第６図はその貼り付け工程図である。
１……リードフレーム、２……アウタリード部
、３……インナリード部、４……ダイパツド部、
５……絶縁基板または絶縁性フイルム、６……中
間パツド（独立電極）。
FIG. 1 shows an embodiment of a lead frame according to the present invention, A is a plan view thereof, B and C are sectional views taken along lines B-B and C-C at A, respectively, and FIGS. The figure shows a conventional lead frame for semiconductor elements, Figure 4 shows the electrical connection between each member in a conventional lead frame for semiconductor elements, and Figure 5 shows an insulating substrate or an insulating film on the die pad. An explanatory diagram of the case of pasting, FIG. 6 is a diagram of the pasting process. 1...Lead frame, 2...Outer lead part, 3...Inner lead part, 4...Die pad part,
5... Insulating substrate or insulating film, 6... Intermediate pad (independent electrode).
Claims (1)
極が形成されている絶縁基板または絶縁性フイル
ムが貼り付けられるダイパツド部と、前記アウタ
ーリード部から延長形成されると共に他端が前記
独立電極とワイヤーにより接続されるインナリー
ド部とを備えたリードフレームにおいて、 前記ダイパツド部は、前記絶縁基板または絶縁
性フイルムの貼付け後にほぼ平坦面となるように
、予め変形した形状を有していることを特徴とす
るリードフレーム。[Claims for Utility Model Registration] An outer lead portion connected to a circuit, a die pad portion to which an insulating substrate or insulating film is attached on which an independent electrode is formed, and an outer lead portion extending from the outer lead portion and other parts. In the lead frame including an inner lead portion whose end is connected to the independent electrode by a wire, the die pad portion has a deformed shape in advance so as to have a substantially flat surface after pasting the insulating substrate or the insulating film. A lead frame comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6694389U JPH036841U (en) | 1989-06-08 | 1989-06-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6694389U JPH036841U (en) | 1989-06-08 | 1989-06-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH036841U true JPH036841U (en) | 1991-01-23 |
Family
ID=31600082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6694389U Pending JPH036841U (en) | 1989-06-08 | 1989-06-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH036841U (en) |
-
1989
- 1989-06-08 JP JP6694389U patent/JPH036841U/ja active Pending