JPS61173191U - - Google Patents
Info
- Publication number
- JPS61173191U JPS61173191U JP5731785U JP5731785U JPS61173191U JP S61173191 U JPS61173191 U JP S61173191U JP 5731785 U JP5731785 U JP 5731785U JP 5731785 U JP5731785 U JP 5731785U JP S61173191 U JPS61173191 U JP S61173191U
- Authority
- JP
- Japan
- Prior art keywords
- board
- case
- bonding surface
- ground pattern
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Description
第１図ａ〜ｃは本考案の一実施例に係るハイブ
リツドＩＣの斜視組立図、第２図および第３図は
それぞれ従来のハイブリツドＩＣの斜視図である
。
（主な参照番号）１……基板、２……ケース、
２ａ……凸部、３，２３，３３……チツプ部品、
１１……回路パターン、２１，３１……セラミツ
ク基板、２１ａ，３１ａ……グランドパツド、２
２，３２……メタルケース、２４……リード線、
３４……スルーホール、３５……導電性接着剤。
1A to 1C are perspective assembly views of a hybrid IC according to an embodiment of the present invention, and FIGS. 2 and 3 are perspective views of conventional hybrid ICs, respectively. (Main reference numbers) 1... Board, 2... Case,
2a... Convex portion, 3, 23, 33... Chip parts,
11... Circuit pattern, 21, 31... Ceramic substrate, 21a, 31a... Ground pad, 2
2, 32...Metal case, 24...Lead wire,
34... Through hole, 35... Conductive adhesive.
Claims (1)
ランドパターンに相当する部分が除去されている
基板と、 該基板を収納し、該基板との接合面が該基板の
除去部分に嵌合する凸部を有し、さらに少なくと
も前記接合面が導電性を示すケースとを具備し、 該ケースの前記凸部の上面をグランドパターン
とすることを等徴とする混成集積回路。 (2) 前記ケースが金属からなる実用新案登録請
求の範囲第１項に記載の混成集積回路。[Claims for Utility Model Registration] (1) A board on which a circuit pattern is formed and a portion corresponding to the ground pattern has been removed, and a board that houses the board and whose bonding surface with the board is the board. and a case in which at least the bonding surface exhibits conductivity, and the upper surface of the protrusion of the case is a ground pattern. circuit. (2) The hybrid integrated circuit according to claim 1, wherein the case is made of metal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5731785U JPS61173191U (en) | 1985-04-17 | 1985-04-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5731785U JPS61173191U (en) | 1985-04-17 | 1985-04-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61173191U true JPS61173191U (en) | 1986-10-28 |
Family
ID=30581732
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5731785U Pending JPS61173191U (en) | 1985-04-17 | 1985-04-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61173191U (en) |
-
1985
- 1985-04-17 JP JP5731785U patent/JPS61173191U/ja active Pending