JPS61116447A - フレ−ム同期回路 - Google Patents

フレ−ム同期回路

Info

Publication number
JPS61116447A
JPS61116447A JP59227014A JP22701484A JPS61116447A JP S61116447 A JPS61116447 A JP S61116447A JP 59227014 A JP59227014 A JP 59227014A JP 22701484 A JP22701484 A JP 22701484A JP S61116447 A JPS61116447 A JP S61116447A
Authority
JP
Japan
Prior art keywords
counter
frame
reference frame
frame pattern
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59227014A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0323018B2 (enrdf_load_stackoverflow
Inventor
Kazuo Yano
一雄 矢野
Shinya Yahagi
矢作　伸也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59227014A priority Critical patent/JPS61116447A/ja
Publication of JPS61116447A publication Critical patent/JPS61116447A/ja
Publication of JPH0323018B2 publication Critical patent/JPH0323018B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59227014A 1984-10-29 1984-10-29 フレ−ム同期回路 Granted JPS61116447A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59227014A JPS61116447A (ja) 1984-10-29 1984-10-29 フレ−ム同期回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59227014A JPS61116447A (ja) 1984-10-29 1984-10-29 フレ−ム同期回路

Publications (2)

Publication Number Publication Date
JPS61116447A true JPS61116447A (ja) 1986-06-03
JPH0323018B2 JPH0323018B2 (enrdf_load_stackoverflow) 1991-03-28

Family

ID=16854161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59227014A Granted JPS61116447A (ja) 1984-10-29 1984-10-29 フレ−ム同期回路

Country Status (1)

Country Link
JP (1) JPS61116447A (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5454509A (en) * 1977-10-11 1979-04-28 Fujitsu Ltd Frame phase synchronism circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5454509A (en) * 1977-10-11 1979-04-28 Fujitsu Ltd Frame phase synchronism circuit

Also Published As

Publication number Publication date
JPH0323018B2 (enrdf_load_stackoverflow) 1991-03-28

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