JPS6045838A - デ−タ転送回路 - Google Patents

デ−タ転送回路

Info

Publication number
JPS6045838A
JPS6045838A JP58152480A JP15248083A JPS6045838A JP S6045838 A JPS6045838 A JP S6045838A JP 58152480 A JP58152480 A JP 58152480A JP 15248083 A JP15248083 A JP 15248083A JP S6045838 A JPS6045838 A JP S6045838A
Authority
JP
Japan
Prior art keywords
output
memory
circuit
data
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58152480A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0222411B2 (show.php
Inventor
Hiroshi Nishimatsu
西松　博志
Toshiro Fukutomi
福富　敏朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP58152480A priority Critical patent/JPS6045838A/ja
Publication of JPS6045838A publication Critical patent/JPS6045838A/ja
Publication of JPH0222411B2 publication Critical patent/JPH0222411B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
JP58152480A 1983-08-23 1983-08-23 デ−タ転送回路 Granted JPS6045838A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58152480A JPS6045838A (ja) 1983-08-23 1983-08-23 デ−タ転送回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58152480A JPS6045838A (ja) 1983-08-23 1983-08-23 デ−タ転送回路

Publications (2)

Publication Number Publication Date
JPS6045838A true JPS6045838A (ja) 1985-03-12
JPH0222411B2 JPH0222411B2 (show.php) 1990-05-18

Family

ID=15541417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58152480A Granted JPS6045838A (ja) 1983-08-23 1983-08-23 デ−タ転送回路

Country Status (1)

Country Link
JP (1) JPS6045838A (show.php)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57203135A (en) * 1981-06-10 1982-12-13 Toshiba Corp Data transfer system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57203135A (en) * 1981-06-10 1982-12-13 Toshiba Corp Data transfer system

Also Published As

Publication number Publication date
JPH0222411B2 (show.php) 1990-05-18

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