JPS60260142A - リ−ドフレ−ム - Google Patents

リ−ドフレ−ム

Info

Publication number
JPS60260142A
JPS60260142A JP59116057A JP11605784A JPS60260142A JP S60260142 A JPS60260142 A JP S60260142A JP 59116057 A JP59116057 A JP 59116057A JP 11605784 A JP11605784 A JP 11605784A JP S60260142 A JPS60260142 A JP S60260142A
Authority
JP
Japan
Prior art keywords
plating
parts
lead
lead frame
gaps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59116057A
Other languages
English (en)
Japanese (ja)
Other versions
JPH022293B2 (enExample
Inventor
Mitsuhiro Miyazawa
宮澤　三宏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP59116057A priority Critical patent/JPS60260142A/ja
Publication of JPS60260142A publication Critical patent/JPS60260142A/ja
Publication of JPH022293B2 publication Critical patent/JPH022293B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10W70/042—

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP59116057A 1984-06-06 1984-06-06 リ−ドフレ−ム Granted JPS60260142A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59116057A JPS60260142A (ja) 1984-06-06 1984-06-06 リ−ドフレ−ム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59116057A JPS60260142A (ja) 1984-06-06 1984-06-06 リ−ドフレ−ム

Publications (2)

Publication Number Publication Date
JPS60260142A true JPS60260142A (ja) 1985-12-23
JPH022293B2 JPH022293B2 (enExample) 1990-01-17

Family

ID=14677633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59116057A Granted JPS60260142A (ja) 1984-06-06 1984-06-06 リ−ドフレ−ム

Country Status (1)

Country Link
JP (1) JPS60260142A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63148668A (ja) * 1986-12-11 1988-06-21 Mitsubishi Electric Corp 半導体装置用リ−ドフレ−ム
US5014112A (en) * 1985-11-12 1991-05-07 Texas Instruments Incorporated Semiconductor integrated circuit device having mirror image circuit bars bonded on opposite sides of a lead frame
US5082802A (en) * 1985-11-12 1992-01-21 Texas Instruments Incorporated Method of making a memory device by packaging two integrated circuit dies in one package
US6656275B2 (en) 2000-04-27 2003-12-02 Shinko Electric Industries Co., Ltd. Partial plating system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5223270A (en) * 1975-08-15 1977-02-22 Dainippon Printing Co Ltd Method of manufacturing lead frames for semiconductors
JPS53125938A (en) * 1977-04-12 1978-11-02 Toshiba Corp Plating method of lead frame
JPS5891650A (ja) * 1981-11-26 1983-05-31 Toshiba Corp 半導体装置
JPS58127356A (ja) * 1982-01-26 1983-07-29 Nippon Texas Instr Kk 半導体集積回路の樹脂封止法およびそのために用いるリ−ドフレ−ム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5223270A (en) * 1975-08-15 1977-02-22 Dainippon Printing Co Ltd Method of manufacturing lead frames for semiconductors
JPS53125938A (en) * 1977-04-12 1978-11-02 Toshiba Corp Plating method of lead frame
JPS5891650A (ja) * 1981-11-26 1983-05-31 Toshiba Corp 半導体装置
JPS58127356A (ja) * 1982-01-26 1983-07-29 Nippon Texas Instr Kk 半導体集積回路の樹脂封止法およびそのために用いるリ−ドフレ−ム

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5014112A (en) * 1985-11-12 1991-05-07 Texas Instruments Incorporated Semiconductor integrated circuit device having mirror image circuit bars bonded on opposite sides of a lead frame
US5082802A (en) * 1985-11-12 1992-01-21 Texas Instruments Incorporated Method of making a memory device by packaging two integrated circuit dies in one package
JPS63148668A (ja) * 1986-12-11 1988-06-21 Mitsubishi Electric Corp 半導体装置用リ−ドフレ−ム
US6656275B2 (en) 2000-04-27 2003-12-02 Shinko Electric Industries Co., Ltd. Partial plating system

Also Published As

Publication number Publication date
JPH022293B2 (enExample) 1990-01-17

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