JPS60245229A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To simplify greatly the process to make planar, by combining a process for leaving photo resist near step portions by means of self alignment or a mask with the step pattern inverted, with an etching process. CONSTITUTION:A silicon substrate 1 with a step difference of 2mum having a positive type resist 2 coated so as to become a thickness of 1mum at planar portions, is exposed by light 4 with the alignment of the photo mask 3 displaced from the wide area step portions by 2mum. Next, developing or etching the said substrate results in removing the resist of the exposed planar portions. After 2mum of the silicon substrate corresponding to the step difference is etched away with a mask of the photo resist 2, the photo resist 2 is removed to form a planar substrate surface. Since the step portions can be made planar widely in this way, to make LSI fine and to result in a high yield can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device in which steps are eliminated on a semiconductor substrate, thereby achieving miniaturization of LSI and improvement in yield.

(Prior Art) Conventionally, to planarize a semiconductor substrate, for example, for a narrow step region of 271 m+1 or less, a thick insulator is formed to fill the step, and then anisotropic dry etching is performed to flatten the step by 1! A method was used in which a portion equivalent to the thickness of the I edge film was etched and flattened. In addition, a selective oxidation mask pattern is formed by photolithography in the step area with a width of 21 m or more.
Planarization was attempted by selective oxidation. However, when this method is used, there are disadvantages such as complicating the LSI manufacturing process, making it difficult to eliminate the step due to the occurrence of misalignment, and further reducing the yield.

(Object of the Invention) The present invention was proposed in order to eliminate these drawbacks, and uses the self-line method to leave the photoresist at least near the stepped portion, and furthermore, uses photolithography to align the field area with rough alignment rather than precise alignment. By aligning the wafer to the wafer, it is possible to planarize the semiconductor substrate by a combination of photolithography and etching in one step, thereby greatly simplifying the planarization process.

(Structure of the Invention) In order to achieve the above object, the present invention, in a semiconductor substrate having a step portion on the surface, coats a photoresist on the surface of the semiconductor substrate including the step portion, and increases the film thickness of the flat portion of the photoresist. performing a development or etching step to remove a considerable amount of the etching, leaving a photoresist in a self-lined manner at least near the step portion; next, using the remaining photoresist as a mask, removing the exposed substrate surface by etching; The gist of the invention is a method for manufacturing a semiconductor device, which comprises a step of flattening a stepped portion of a substrate.

Next, the present invention will be explained in detail. It should be noted that the embodiments are merely illustrative, and it goes without saying that various changes and improvements may be made without departing from the spirit of the present invention.

FIG. 1 shows an embodiment of the present invention, and FIG. 1(a) shows a silicon substrate 1 having a step of 2 μm, for example.
(The width of the stepped part is 1/Jll in a narrow area, and lo in a wide area.
It is about oOpm. ), for example, a positive resist 2 is coated on the flat part to a thickness of 1 pwa (the resist surface absorbs the shape of the surface step part of the underlying substrate and becomes smooth), and then a wide area is coated. A state in which the alignment of the photomask 3 is shifted by 2 ρm from the stepped portion and exposed with the exposure light 4 is shown. Figure 1(b) is Figure 1(a)
The substrate is developed or etched using a wet or dry resist developer, and the exposed flat portions of the resist are removed. Figure 1 (C) shows photoresist 2.
This is a state in which the silicon substrate 1 is etched by 2 .mu.m, which is equivalent to a step difference, by wet etching or dry etching using the mask as shown in FIG. FIG. 1(d) shows a state in which the photoresist 2 has been removed, and a flat substrate surface has been obtained.

FIG. 2 shows an example in which a substrate surface is used in which, for example, an antireflection film 5 is formed on the surface of a substrate 1 having steps. The anti-reflection film 5 is provided so that it absorbs the light that passes through the resist 2 during exposure, eliminates light that is reflected on the surface of the substrate 1, and protects the resist from interference with incident light. This is to prevent the second exposure from being affected.

FIG. 2(,) shows a state in which the resist 2 is coated on the substrate B, and then the alignment of the photomask 3 is shifted by 2 .mu.m from the stepped portion with respect to the wide area, and the resist 2 is exposed to light 4 for exposure. FIG. 2(b) shows a state in which the substrate of FIG. 2(a) is developed or etched with a wet or dry resist developer, and the exposed flat portions of the resist are removed. Next, the substrate 1 is etched using the resist 2 as a mask, and a flat substrate surface can be obtained by following steps similar to those shown in FIG. The anti-reflection film is a multilayer resist film.

CVD・SiO,! , poly-Si, and Si3N4 are used.

Next, FIG. 3 shows an embodiment in which a multilayer (three layers in the figure) resist is used. Therefore, in FIG. 3(,), a first layer resist 2 is formed on a substrate 1 having a step, and then a second layer resist film 12 is formed.
Next, after forming the third layer resist film 13, a photomask 3
This shows the state where alignment is performed and exposure is performed.

FIG. 3(b) shows the substrate of FIG. 3(a) developed with a resist developer to form a third layer resist film 13. FIG. 3C shows the second resist film 12 etched using the third resist film 13 as a mask. In FIG. 3(d), the first layer resist 2 is etched using the third layer resist film 13 and the second layer resist film 12 as masks. Thereafter, by performing the same steps as in FIG. 1(C), a result similar to that in FIG. 1(d) can be obtained.

FIG. 4 shows another embodiment of the invention. Fourth
Figure (a) shows, for example, a CVD process on a substrate 1 having a step.
A 5in2 film 6 formed to a thickness of 1 pm is shown. In FIG. 4(b), the CvDSI02 film 6 is etched by an amount equivalent to the thickness v by anisotropic dry etching, and only the side walls are etched by CVD.
A state in which the SiO3 film 6 remains is shown. FIG. 4(C) shows a state in which a photoresist 2 is applied to the substrate surface, and a photomask 3 is exposed with the alignment shifted by 0.5 pm from the edge of the step.

FIG. 4(d) shows a state in which the exposed flat portion of the resist has been removed by development or etching. Figure 4 (0
) is a substrate 1 using a photoresist 2 and a CVD oxide film 6 as a mask.
This is the state where the steps have been etched. Thereafter, by removing the resist 2 and the CVD 5in2 film 6, a flat substrate surface can be obtained.

FIG. 5 shows an example in which these planarization methods are applied to planarization of isolation between elements for bipolar LSI. Figure 5 (
In a), for example, on a semiconductor substrate 11 having a surface step with n1 embedded N99, an n-type epitaxial layer 8, and a channel cut ion implantation region 10, a CVD film with a surface step equivalent to, for example, 2p years old is used as an insulating film for isolation between elements.・5
After forming the in2 film 7, a resist 2 is formed in the same manner as in FIG. 1(a), aligned with a photoresist 3 at a distance of 3 layers from the end of the step batten, and exposed. FIG. 5(b) shows a state in which the exposed flat portion of the resist has been removed by development or etching. Even if the alignment is shifted by 3 pI11, the resist at the end of the button contacts the stepped portion in a self-aligned manner. Figure 5 (C) is
For example, by etching using photoresist 2 as a mask, CvD.5i021I! j! 7 is etched to correspond to the level difference.

FIG. 5(d) shows a state in which the mask resist 2- has been removed. According to this embodiment, a flat substrate surface of 1 q can be made with a very simple process.

Furthermore, as the light source for exposing the photoresist in the above description, the same effect can be obtained by using ultraviolet rays, deep ultraviolet rays, X-rays, and electron beams in addition to visible light.

In addition, it is also possible to use a reversal mask of the step pattern on the substrate as a photomask for alignment.
Furthermore, by using a negative inorganic resist such as selenium german as the photoresist material, the mask used to create the step pattern on the substrate can be reused as is.

(Effects of the Invention) As described above, according to the present invention, the step portion on the surface of the semiconductor substrate can be flattened to a wide extent, so that it has the effect of realizing miniaturization of LSI and high yield.

[Brief explanation of drawings]

FIGS. 1(n) to (d) show an embodiment of the method for manufacturing a semiconductor device of the present invention, FIG. 2(b), and FIG. 3(a).
~(d), Figures 4(a)~(e), Figures 5(a)~(d)
) shows other embodiments of the present invention. 1.11 ...Semiconductor substrate 2 ...Positive photoresist 3 ...
Photomask 4... Light source 5 for photoresist exposure...
・・Repulsion prevention ll9 6---- Cv■l, S i 02 crotch 7° -・i
Output for child part M kN H5; CV D S+ 02B
*8. . . . n-type epitaxial layer 9 . . . n” buried layer 10 . . .
3 - Shijinut (d) 1 Figure 2 ↓ ↓ ↓ l ↓ G 4 Figure 3 - 4 Figure procedure amendment NF (voluntary) February 28, 1985 Manabu Shiga, Commissioner of the Patent Office 1, Indication of the incident Patent Order No. 100650 of 19822, Name of the invention: Method for manufacturing semiconductor devices 3, Relationship with the case of the person making the amendment Patent applicant name: Japan Type One Word Telephone Public Corporation 4, Agent address: Shinjuku-ku, Tokyo, 160 Nishi-Shinjuku 7-5 [No. 0 No. 2 Mizota Building 7th Floor (1) Specification, Claims, Detailed Description of the Invention (1)
) The amendment in the re-statement of the specification takes into consideration Figure 3 of attached sheet '\O9 (2) and adds section 61'l. (1) The scope of claims is amended as follows. r (1) In a semiconductor substrate having a step portion on the surface, a photoresist is applied to the surface of the semiconductor substrate including the step portion, and a developing or etching process is performed to remove a film thickness equivalent to the flat portion of the photoresist. The process includes a step of leaving a photoresist in the vicinity of the step portion by cell 2 alignment, and a step of using the remaining photoresist as a mask to remove the exposed substrate surface by etching to flatten the step portion of the substrate. A method for manufacturing a semiconductor device, characterized by: (2) In a semiconductor substrate having a concave portion and a stepped portion on the substrate surface, applying a photoresist to the surface of the substrate,
A step of leaving the photoresist by self-line except for the area including the concave portion near the stepped portion, and then a step of using the remaining photoresist as a mask to expose and remove the surface of the substrate by etching. A method for manufacturing a semiconductor device according to claim 1. (3) In a semiconductor device having at least a stepped portion,
A step of forming an anti-reflection film on the semiconductor surface including the step portion, then applying a photoresist on the anti-reflection film, leaving the photoresist near the step portion with a self-line, and then removing the remaining photoresist. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of using a mask to remove the exposed surface of the substrate by etching. (4) A step of forming a film on a region having a surface step for an element isolation process, and then applying a photoresist on the film and developing the photoresist to form a self-line near the step. A process of leaving photoresist;
4. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of removing the exposed film surface by etching using the remaining photorenost as a mask. (5) A step of forming a single-layer or multi-layer groove structure on a substrate having a surface step for the 1-Usu process for the amount of elements, which is equivalent to or more than the step, and then a photorin process is applied to the above film to form a step on the substrate.・The process of leaving a photoresist near the stepped part for the inverted pattern of the turn or shifted by the desired number, and then exposing the single layer or multilayer film using the remaining photoresist as a mask. A method for manufacturing a semiconductor device according to claim 1, characterized in that the surface of the substrate is planarized by the step of removing the substrate by etching.(2) Specification box, page 4, line 1 of[
Correct the photoresist using the self-line method as follows. [Photoresist using the self-line method or the alignment method. (3) The 1st photoline on page 4, line 3, is not a highly accurate alignment, but an approximate alignment.'' Correct as follows. [Align with photoresist line to a certain accuracy, for example, within ±0.5 μm.'' (4) On page 4, line 15, ``Photoresist with self-resist line at least near the step portion'' as follows. [Photoresist near the above-mentioned step portion using a self-line or step)-turn inversion mask.'' (5) ``Form the renost film 12 on page 7, line 10, and then apply 2g3 layer ii.'' ! 13” is corrected as follows. "An anti-reflection film 5 which is a resist film is formed, and then a third layer 17 and a resist film 12 are formed." (6) "Resist film 13" on page 7, line 14 is corrected as follows. 31(d) is a mask of the third layer resist film 13 and the second layer resist film 12. "to" should be corrected as follows. "An anti-reflection film 5, which is a resist film, is etched. FIG. 3(d) shows the third layer resist film 12 and the anti-reflection film 5, which is a second resist film, used as a mask." (8) Specification Insert the following sentence between page 9 @ line 19 and line '20. [FIG. 6 is an example in which a 9-tan inversion photomask for element isolation is applied to planarize element isolation for bipolar LSI. Figure 6 (a) shows the substrate in Figure 5 (a) after aligning and exposing the inverted and tanned elements for isolation between elements; Figure 6 (b) shows the exposed resist being removed by development or etching. Indicates the state in which Figure 6 (
c) shows the state in which the z film 7 is etched using, for example, wet etching using the photoresist 2 as a mask. The CVD-8s O2 film on the step part is made of Photorenost 2 and C
By increasing the etching rate at the interface of the VD・S s O2 film (for example, by increasing the etching rate at the interface to approximately 1.5 times the etching rate in the film thickness direction, etching reaches the S s O2 surface in the flat area). ) A flat substrate surface as shown in FIG. 6(d) is obtained. In this case, the inversion mask can be kept within 10.3 μm. ” (9) On the last line of page 10, after “~(d)”, “and
Insert "Figures (a) to (d)". (10 Correct “2” on page 11, line 2 of the same document as r2.+2J. (1υ “1.2, 1.3・” on page 11, line 11 of the same document)
・・・・・・Delete “Rennost”.

Claims (4)

[Claims] (1) In a semiconductor substrate having a stepped portion on its surface, a photoresist is applied to the surface of the semiconductor substrate including the stepped portion, and a developing or etching process is performed to remove a film thickness equivalent to the flat portion of the photoresist, and at least the above-mentioned steps are applied. The process includes a step of leaving photoresist in the vicinity of the stepped portion using a self-line, and then a step of using the remaining photoresist as a mask to remove the exposed surface of the substrate by etching to flatten the stepped portion of the substrate. A method for manufacturing a featured semiconductor device. (2) In a semiconductor substrate having a concave portion and a stepped portion on the substrate surface, applying a photoresist to the surface of the substrate,
The method includes a step of leaving the photoresist in a self-lined manner except for the region including the concave portion near the stepped portion, and then a step of removing the exposed substrate surface by etching using the remaining photoresist as a mask. A method for manufacturing a semiconductor device according to claim 1. (3) In a semiconductor device having at least a stepped portion,
A process of forming an anti-reflection film on the surface of the half body including the step part, then applying a photoresist on the anti-reflection film, leaving the photoresist near the step part with a self-line, and then 2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of removing the exposed surface of the substrate by etching using a photoresist as a mask. (4) A step of forming a film on a region having a surface step for an element isolation process, and then applying a photoresist on the film and subjecting the photoresist to a development step to form a self-line near the step. A method for manufacturing a semiconductor device according to claim 1, comprising the steps of leaving the photoresist, and then removing the exposed film surface by etching using the remaining photoresist as a mask.