JPS60181843A - 実時間タイマ方式 - Google Patents
実時間タイマ方式Info
- Publication number
- JPS60181843A JPS60181843A JP59036073A JP3607384A JPS60181843A JP S60181843 A JPS60181843 A JP S60181843A JP 59036073 A JP59036073 A JP 59036073A JP 3607384 A JP3607384 A JP 3607384A JP S60181843 A JPS60181843 A JP S60181843A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- information
- timer
- timer information
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59036073A JPS60181843A (ja) | 1984-02-29 | 1984-02-29 | 実時間タイマ方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59036073A JPS60181843A (ja) | 1984-02-29 | 1984-02-29 | 実時間タイマ方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60181843A true JPS60181843A (ja) | 1985-09-17 |
| JPH0347538B2 JPH0347538B2 (https=) | 1991-07-19 |
Family
ID=12459558
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59036073A Granted JPS60181843A (ja) | 1984-02-29 | 1984-02-29 | 実時間タイマ方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60181843A (https=) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58192152A (ja) * | 1982-05-07 | 1983-11-09 | Hitachi Ltd | プロセスの終了監視方式 |
-
1984
- 1984-02-29 JP JP59036073A patent/JPS60181843A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58192152A (ja) * | 1982-05-07 | 1983-11-09 | Hitachi Ltd | プロセスの終了監視方式 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0347538B2 (https=) | 1991-07-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH07319747A (ja) | データ更新システム | |
| JPS5897944A (ja) | 複数マイクロプロセツサ間デ−タ転送方式 | |
| JPS60181843A (ja) | 実時間タイマ方式 | |
| EP0285634B1 (en) | Method to execute two instruction sequences in an order determined in advance | |
| JPH04284548A (ja) | データベース排他制御方式 | |
| JPS61267813A (ja) | 実時間タイマ装置 | |
| JPS6244859A (ja) | 実時間タイマ装置 | |
| JP3144979B2 (ja) | プログラム処理装置及び処理方法 | |
| JP2603013B2 (ja) | リングバッファのメッセージ管理処理方式 | |
| JP2708012B2 (ja) | 更新バッファ管理装置 | |
| JP2855495B2 (ja) | 端末呼び出し方式 | |
| JPH0235541A (ja) | 主記憶装置の制御方式 | |
| JPH0326413B2 (https=) | ||
| JPH0273420A (ja) | 半導体ディスク装置 | |
| JPS63204329A (ja) | パイプライン処理型情報処理装置 | |
| JPS62282345A (ja) | キヤツシユメモリ | |
| JPH09146877A (ja) | メモリ間データ転送制御装置 | |
| JPS5990130A (ja) | デ−タバツフア制御方式 | |
| JPS63208945A (ja) | 情報処理装置 | |
| JPH10116227A (ja) | キャッシュメモリの書き戻し制御システム | |
| JPS63155338A (ja) | プログラム実行履歴記録制御方式 | |
| JPH06161944A (ja) | Dma制御装置 | |
| JPH05298240A (ja) | ダイレクト・メモリ・アクセス・コントローラ | |
| JPS60254256A (ja) | 情報処理装置 | |
| JPH06152680A (ja) | マルチプロセッサ通信方式 |