JPS60156748U - 半導体装置 - Google Patents
半導体装置Info
- Publication number
- JPS60156748U JPS60156748U JP1984044327U JP4432784U JPS60156748U JP S60156748 U JPS60156748 U JP S60156748U JP 1984044327 U JP1984044327 U JP 1984044327U JP 4432784 U JP4432784 U JP 4432784U JP S60156748 U JPS60156748 U JP S60156748U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- semiconductor equipment
- located near
- main part
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は本考案の一実施例の要部概略側面図で、第2図
はその要部概略平面図、第3図は本考案の上記実施例の
一具体例の要部概略平面図で、第4図はその要部概略側
面図、第5図は本考案の上記実施例の他の具体例の要部
概略平面図で、第一6図はその要部概略側面図、第7図
は第1図のリードフレームの上段リードにおけるワイヤ
ボンディングを示す要部概略平面図で、第8図はそのA
−A線断面図、第9図は従来のリードフレームの平面図
である。 2、8c、 10d・・・・・・基板、5・・・・・
・半導体装 子、3t 4t 7at 8at
10at 10b”””リ ・−ド部。
はその要部概略平面図、第3図は本考案の上記実施例の
一具体例の要部概略平面図で、第4図はその要部概略側
面図、第5図は本考案の上記実施例の他の具体例の要部
概略平面図で、第一6図はその要部概略側面図、第7図
は第1図のリードフレームの上段リードにおけるワイヤ
ボンディングを示す要部概略平面図で、第8図はそのA
−A線断面図、第9図は従来のリードフレームの平面図
である。 2、8c、 10d・・・・・・基板、5・・・・・
・半導体装 子、3t 4t 7at 8at
10at 10b”””リ ・−ド部。
Claims (1)
- 基板に半導体素子を固定すると共に、半導体装−子の電
極と先端が半導体素子の近傍に位置するように配設され
たリード部とをボンデイングライヤにて接続し、かつ半
導体素子を含む主要部分を樹脂材にてモールド被覆した
ものにおいて、上記半導体素子の近傍に位置するリード
部先端を複数段に配設したことを特徴とする半導体装置
。 ′
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984044327U JPS60156748U (ja) | 1984-03-28 | 1984-03-28 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984044327U JPS60156748U (ja) | 1984-03-28 | 1984-03-28 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60156748U true JPS60156748U (ja) | 1985-10-18 |
Family
ID=30556798
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984044327U Pending JPS60156748U (ja) | 1984-03-28 | 1984-03-28 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60156748U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004261512A (ja) * | 2003-03-04 | 2004-09-24 | Pentax Corp | 固体撮像素子、電子内視鏡 |
-
1984
- 1984-03-28 JP JP1984044327U patent/JPS60156748U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004261512A (ja) * | 2003-03-04 | 2004-09-24 | Pentax Corp | 固体撮像素子、電子内視鏡 |
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