JPS60132016U - digital sine wave generator - Google Patents

digital sine wave generator

Info

Publication number
JPS60132016U
JPS60132016U JP1819284U JP1819284U JPS60132016U JP S60132016 U JPS60132016 U JP S60132016U JP 1819284 U JP1819284 U JP 1819284U JP 1819284 U JP1819284 U JP 1819284U JP S60132016 U JPS60132016 U JP S60132016U
Authority
JP
Japan
Prior art keywords
sine wave
wave generator
digital sine
pieces
initial value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1819284U
Other languages
Japanese (ja)
Inventor
嘉一 山本
真一 小森
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP1819284U priority Critical patent/JPS60132016U/en
Publication of JPS60132016U publication Critical patent/JPS60132016U/en
Pending legal-status Critical Current

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  • Electrophonic Musical Instruments (AREA)
  • Recording Measured Values (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のディジタル正弦波発生器のブロック図、
第2図はこの考案の一実施例のブロック図、第3図はこ
の考案の一実施例の説明に用いる波形図、第4図はこの
考案の他の実施例のブロツ久図、第5図はこの考案の他
の実施例の説明に用いる波形図、第6図はこの考案の他
の実施例の説明に用いるタイムチャートである。 10.11,2’j、22,23,24,27゜29・
・・・・・ラッチ、15.28・・・・・・ROM、1
4゜30・・・・・・減算回路。
Figure 1 is a block diagram of a conventional digital sine wave generator.
Fig. 2 is a block diagram of one embodiment of this invention, Fig. 3 is a waveform diagram used to explain one embodiment of this invention, Fig. 4 is a block diagram of another embodiment of this invention, and Fig. 5 is a waveform diagram used to explain another embodiment of this invention, and FIG. 6 is a time chart used to explain another embodiment of this invention. 10.11,2'j,22,23,24,27°29・
...Latch, 15.28 ...ROM, 1
4゜30... Subtraction circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 出力する正弦波データの少くとも2個の初期値データが
貯られる記憶素子と、上記2個の初期値データから次の
サンプリング値を発生する係数乗算回路及び減算回路と
を備えたディジタル正弦波発生器。
A digital sine wave generator comprising a memory element that stores at least two pieces of initial value data of the sine wave data to be output, and a coefficient multiplication circuit and a subtraction circuit that generate the next sampling value from the two pieces of initial value data. vessel.
JP1819284U 1984-02-10 1984-02-10 digital sine wave generator Pending JPS60132016U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1819284U JPS60132016U (en) 1984-02-10 1984-02-10 digital sine wave generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1819284U JPS60132016U (en) 1984-02-10 1984-02-10 digital sine wave generator

Publications (1)

Publication Number Publication Date
JPS60132016U true JPS60132016U (en) 1985-09-04

Family

ID=30506593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1819284U Pending JPS60132016U (en) 1984-02-10 1984-02-10 digital sine wave generator

Country Status (1)

Country Link
JP (1) JPS60132016U (en)

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