JPS6140670U - phase comparison circuit - Google Patents

phase comparison circuit

Info

Publication number
JPS6140670U
JPS6140670U JP12583284U JP12583284U JPS6140670U JP S6140670 U JPS6140670 U JP S6140670U JP 12583284 U JP12583284 U JP 12583284U JP 12583284 U JP12583284 U JP 12583284U JP S6140670 U JPS6140670 U JP S6140670U
Authority
JP
Japan
Prior art keywords
phase comparison
comparison circuit
phase comparator
hold
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12583284U
Other languages
Japanese (ja)
Other versions
JPH0225180Y2 (en
Inventor
正夫 神田
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP12583284U priority Critical patent/JPS6140670U/en
Publication of JPS6140670U publication Critical patent/JPS6140670U/en
Application granted granted Critical
Publication of JPH0225180Y2 publication Critical patent/JPH0225180Y2/ja
Granted legal-status Critical Current

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  • Measuring Phase Differences (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図は従来の位相比較回路の回路図、第2図は第1図
の回路の出力波形の態様を夫々示す図、第3図は本考案
の実施例の回路図、第4図〜第6図は本考案の他の実施
例の一部回路図てある。 主要部分の符号の説明、1・・・・・・乗算回路、2・
・・・・・サンプルホールド回路、4,5・・・・・・
共振回路。
[Brief Description of the Drawings] Fig. 1 is a circuit diagram of a conventional phase comparator circuit, Fig. 2 is a diagram showing aspects of output waveforms of the circuit of Fig. 1, and Fig. 3 is a circuit diagram of an embodiment of the present invention. 4 to 6 are partial circuit diagrams of other embodiments of the present invention. Explanation of the symbols of the main parts, 1...Multiplication circuit, 2.
...Sample hold circuit, 4,5...
resonant circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 2人力信号の乗算信号を得てこの乗算信号のレベルをサ
ンプルホールドしてこのホールド出力を位相比較出力と
してなる位相比較回路であって、前記サンプルホールド
のためのホールド素子の前段に特定周波数を減衰せしめ
る手段を具備してなることを特徴とする位相比較回路。
A phase comparator circuit that obtains a multiplied signal of two human power signals, samples and holds the level of this multiplied signal, and uses this hold output as a phase comparison output, the circuit attenuating a specific frequency before the hold element for sample and hold. 1. A phase comparator circuit characterized in that it is provided with means for controlling the phase comparator.
JP12583284U 1984-08-18 1984-08-18 phase comparison circuit Granted JPS6140670U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12583284U JPS6140670U (en) 1984-08-18 1984-08-18 phase comparison circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12583284U JPS6140670U (en) 1984-08-18 1984-08-18 phase comparison circuit

Publications (2)

Publication Number Publication Date
JPS6140670U true JPS6140670U (en) 1986-03-14
JPH0225180Y2 JPH0225180Y2 (en) 1990-07-11

Family

ID=30684522

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12583284U Granted JPS6140670U (en) 1984-08-18 1984-08-18 phase comparison circuit

Country Status (1)

Country Link
JP (1) JPS6140670U (en)

Also Published As

Publication number Publication date
JPH0225180Y2 (en) 1990-07-11

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