JPS60125726U - 化合物半導体ミラ−ウエハ - Google Patents
化合物半導体ミラ−ウエハInfo
- Publication number
- JPS60125726U JPS60125726U JP1984013672U JP1367284U JPS60125726U JP S60125726 U JPS60125726 U JP S60125726U JP 1984013672 U JP1984013672 U JP 1984013672U JP 1367284 U JP1367284 U JP 1367284U JP S60125726 U JPS60125726 U JP S60125726U
- Authority
- JP
- Japan
- Prior art keywords
- compound semiconductor
- mirror wafer
- semiconductor mirror
- abstract
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 150000001875 compounds Chemical class 0.000 title claims description 3
- 239000004065 semiconductor Substances 0.000 title claims description 3
- 238000005530 etching Methods 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02019—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30612—Etching of AIIIBV compounds
- H01L21/30617—Anisotropic liquid etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/901—Printed circuit
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Ceramic Engineering (AREA)
- Weting (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は化合物半導体ウェハ臂開面に沿う長方形をフォ
トレジストによって覆い周囲をエツチングした場合aと
、長方形を残してフォトレジストによって覆いこの長方
形をエツチングした場合すのメサ方向の縦断面図。第2
図は第1図と同じ条件で逆メサ方向の断面図を示す。第
3図はウェハを方向性のあるエツチング液でエツチング
した時のパターンを示す図。第4図はパターンひとつの
長手方向の断面図。第5図はパターンひとつの長手方向
に直角な方向の断面図。
トレジストによって覆い周囲をエツチングした場合aと
、長方形を残してフォトレジストによって覆いこの長方
形をエツチングした場合すのメサ方向の縦断面図。第2
図は第1図と同じ条件で逆メサ方向の断面図を示す。第
3図はウェハを方向性のあるエツチング液でエツチング
した時のパターンを示す図。第4図はパターンひとつの
長手方向の断面図。第5図はパターンひとつの長手方向
に直角な方向の断面図。
Claims (1)
- 裏面にエツチングによってメサ方向を示すバタ・ −ン
を形成した事を特徴とする化合物半導体ミラーウェハ。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984013672U JPS60125726U (ja) | 1984-02-02 | 1984-02-02 | 化合物半導体ミラ−ウエハ |
EP19920101245 EP0489710A3 (en) | 1984-02-02 | 1985-01-24 | A mirror wafer of compound semiconductor |
EP85300479A EP0153028A3 (en) | 1984-02-02 | 1985-01-24 | A mirror wafer of compound semiconductor |
US06/696,578 US4628016A (en) | 1984-02-02 | 1985-01-30 | Mirror wafer of compound semiconductor |
CA000473463A CA1211863A (en) | 1984-02-02 | 1985-02-01 | Mirror wafer of compound semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1984013672U JPS60125726U (ja) | 1984-02-02 | 1984-02-02 | 化合物半導体ミラ−ウエハ |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60125726U true JPS60125726U (ja) | 1985-08-24 |
Family
ID=11839682
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1984013672U Pending JPS60125726U (ja) | 1984-02-02 | 1984-02-02 | 化合物半導体ミラ−ウエハ |
Country Status (4)
Country | Link |
---|---|
US (1) | US4628016A (ja) |
EP (2) | EP0489710A3 (ja) |
JP (1) | JPS60125726U (ja) |
CA (1) | CA1211863A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6273642A (ja) * | 1985-09-26 | 1987-04-04 | Hitachi Cable Ltd | InP基板のメサ方向判別方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4114660C2 (de) * | 1991-05-06 | 1997-09-18 | Telefunken Microelectron | Verfahren zur Herstellung glaspassivierter Halbleiterbauelemente |
JPH08236442A (ja) * | 1995-02-28 | 1996-09-13 | Mitsubishi Electric Corp | 半導体ウエハ,及びその製造方法 |
JP3397968B2 (ja) * | 1996-03-29 | 2003-04-21 | 信越半導体株式会社 | 半導体単結晶インゴットのスライス方法 |
JP2001223145A (ja) * | 2000-02-07 | 2001-08-17 | Komatsu Ltd | 特異な形態のドットマークを有する半導体ウェハとそのドットマークの形成方法 |
US6554687B1 (en) * | 2000-09-27 | 2003-04-29 | Virginia Semiconductor, Inc. | Precise crystallographic-orientation alignment mark for a semiconductor wafer |
US20070073448A1 (en) * | 2003-08-19 | 2007-03-29 | Renesas Technology Corp. | Semiconductor device having a hole or a step of normal mesa shape as viewed from any cross-section and manufacturing method of the same |
JP2005064068A (ja) * | 2003-08-19 | 2005-03-10 | Renesas Technology Corp | 半導体装置及びその製造方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5575221A (en) * | 1978-12-04 | 1980-06-06 | Fujitsu Ltd | Manufacturing semiconductor |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58100424A (ja) * | 1981-12-10 | 1983-06-15 | Nippon Telegr & Teleph Corp <Ntt> | リソグラフイ用↑¬合せマ−クの形成方法 |
JPS6088536U (ja) * | 1983-11-24 | 1985-06-18 | 住友電気工業株式会社 | 化合物半導体ウエハ |
-
1984
- 1984-02-02 JP JP1984013672U patent/JPS60125726U/ja active Pending
-
1985
- 1985-01-24 EP EP19920101245 patent/EP0489710A3/en not_active Ceased
- 1985-01-24 EP EP85300479A patent/EP0153028A3/en not_active Ceased
- 1985-01-30 US US06/696,578 patent/US4628016A/en not_active Expired - Fee Related
- 1985-02-01 CA CA000473463A patent/CA1211863A/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5575221A (en) * | 1978-12-04 | 1980-06-06 | Fujitsu Ltd | Manufacturing semiconductor |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6273642A (ja) * | 1985-09-26 | 1987-04-04 | Hitachi Cable Ltd | InP基板のメサ方向判別方法 |
Also Published As
Publication number | Publication date |
---|---|
EP0153028A3 (en) | 1988-08-31 |
EP0489710A2 (en) | 1992-06-10 |
EP0153028A2 (en) | 1985-08-28 |
EP0489710A3 (en) | 1993-12-15 |
CA1211863A (en) | 1986-09-23 |
US4628016A (en) | 1986-12-09 |
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