JPS5994143A - 除算回路 - Google Patents

除算回路

Info

Publication number
JPS5994143A
JPS5994143A JP57202944A JP20294482A JPS5994143A JP S5994143 A JPS5994143 A JP S5994143A JP 57202944 A JP57202944 A JP 57202944A JP 20294482 A JP20294482 A JP 20294482A JP S5994143 A JPS5994143 A JP S5994143A
Authority
JP
Japan
Prior art keywords
register
divisor
word length
adder
division
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57202944A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0413734B2 (enrdf_load_stackoverflow
Inventor
Tsutomu Sakamoto
務 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP57202944A priority Critical patent/JPS5994143A/ja
Publication of JPS5994143A publication Critical patent/JPS5994143A/ja
Publication of JPH0413734B2 publication Critical patent/JPH0413734B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/535Dividing only

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Executing Machine-Instructions (AREA)
JP57202944A 1982-11-19 1982-11-19 除算回路 Granted JPS5994143A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57202944A JPS5994143A (ja) 1982-11-19 1982-11-19 除算回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57202944A JPS5994143A (ja) 1982-11-19 1982-11-19 除算回路

Publications (2)

Publication Number Publication Date
JPS5994143A true JPS5994143A (ja) 1984-05-30
JPH0413734B2 JPH0413734B2 (enrdf_load_stackoverflow) 1992-03-10

Family

ID=16465743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57202944A Granted JPS5994143A (ja) 1982-11-19 1982-11-19 除算回路

Country Status (1)

Country Link
JP (1) JPS5994143A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03269588A (ja) * 1990-03-20 1991-12-02 Yamaha Corp 電子楽器
JPH04172526A (ja) * 1990-11-07 1992-06-19 Toshiba Corp 浮動小数点除算器

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03269588A (ja) * 1990-03-20 1991-12-02 Yamaha Corp 電子楽器
JPH04172526A (ja) * 1990-11-07 1992-06-19 Toshiba Corp 浮動小数点除算器

Also Published As

Publication number Publication date
JPH0413734B2 (enrdf_load_stackoverflow) 1992-03-10

Similar Documents

Publication Publication Date Title
JP3110288B2 (ja) 指数対数変換回路
US5452241A (en) System for optimizing argument reduction
US20040128331A1 (en) Data processing apparatus and method for converting a number between fixed-point and floating-point representations
JP3178746B2 (ja) 浮動小数点数のためのフォーマット変換装置
JPH0145649B2 (enrdf_load_stackoverflow)
JPS61237133A (ja) 演算回路
US20220188074A1 (en) Ai calculation circuit
JPH10500513A (ja) ディジタル除算実行装置
JPS5994143A (ja) 除算回路
US4823300A (en) Performing binary multiplication using minimal path algorithm
JPH01302425A (ja) 浮動小数点加減算回路
GB2559039B (en) Leading zero anticipation
US5754458A (en) Trailing bit anticipator
JP4428778B2 (ja) 演算装置及び演算方法並びに計算装置
JPH0283728A (ja) 浮動小数点乗算装置
JPS62128331A (ja) 情報処理装置
JPS63158626A (ja) 演算処理装置
JP3137131B2 (ja) 浮動小数点乗算器及び乗算方法
JPS61224036A (ja) 演算装置
JPS6238937A (ja) 浮動小数点演算における保護桁処理方式
JPH0778724B2 (ja) 除算器
JPH03217938A (ja) 浮動小数点丸め正規化装置
JPS62168228A (ja) 浮動小数点積和演算器
JPH01233520A (ja) 高基数非回復型除算装置
JPH04153729A (ja) 浮動小数点演算補助回路